/home/hudson/saved_omc/OMSimulator/install/bin/OMSimulator --tempDir=temp_IDEAS_dev_IDEAS_Electrical_DC_Lines_Examples_DCLine_fmu --startTime=0 --stopTime=1 --stepSize=0.0004 --timeout=50 --tolerance=1e-06 IDEAS_dev_IDEAS_Electrical_DC_Lines_Examples_DCLine.fmu warning: Failed to load settings: [json.exception.parse_error.101] parse error at line 4, column 1: syntax error while parsing value - unexpected '}'; expected end of input warning: Failed to save settings: [json.exception.parse_error.101] parse error at line 4, column 1: syntax error while parsing value - unexpected '}'; expected end of input info: Set temp directory to "/var/lib/jenkins1/ws/OpenModelicaLibraryTestingWork_2/OpenModelicaLibraryTesting/IDEAS_dev_IDEAS.Electrical.DC.Lines.Examples.DCLine" info: Set working directory to "/var/lib/jenkins1/ws/OpenModelicaLibraryTestingWork_2/OpenModelicaLibraryTesting/IDEAS_dev_IDEAS.Electrical.DC.Lines.Examples.DCLine" info: New model "model" with corresponding temp directory "/var/lib/jenkins1/ws/OpenModelicaLibraryTestingWork_2/OpenModelicaLibraryTesting/IDEAS_dev_IDEAS.Electrical.DC.Lines.Examples.DCLine/model-dwgrj79w" info: *** FMU Simulation Info *** - model: model (model exchange) - path: IDEAS_dev_IDEAS_Electrical_DC_Lines_Examples_DCLine.fmu - startTime: 0.000000 - stopTime: 1.000000 - tolerance: 0.000001 - stepSize: 0.000400 info: model doesn't contain any continuous state info: maximum step size for 'model.root': 0.000400 info: Result file: model_res.mat (bufferSize=10) LOG_ASSERT | error | [/home/hudson/saved_omc/libraries/.openmodelica/libraries/IDEAS 3.0.0-master/Electrical/Interfaces/Load.mo:79:3-79:117:writable] | | | | The following assertion has been violated at time 0.800000 | | | | ((varLoad.y >= 0.0 and varLoad.y <= 1.0000000001)) --> "The power load fraction P (input of the model) must be within [0,1]" error: [fmi2logger] [fmi2Error] /var/lib/jenkins1/ws/OpenModelicaLibraryTestingWork_2/OpenModelicaLibraryTesting/IDEAS_dev_IDEAS.Electrical.DC.Lines.Examples.DCLine/model-dwgrj79w/temp/0001_IDEAS_dev_IDEAS_Electrical_DC_Lines_Examples_DCLine/logFmi2Call: fmi2CompletedIntegratorStep: terminated by an assertion. error: [doStepCVODE] fmi2_completedIntegratorStep failed for FMU "model.root.IDEAS_dev_IDEAS_Electrical_DC_Lines_Examples_DCLine" warning: Bad return code at time 0.800000 LOG_ASSERT | error | [/home/hudson/saved_omc/libraries/.openmodelica/libraries/IDEAS 3.0.0-master/Electrical/Interfaces/Load.mo:79:3-79:117:writable] | | | | The following assertion has been violated at time 0.800000 | | | | ((varLoad.y >= 0.0 and varLoad.y <= 1.0000000001)) --> "The power load fraction P (input of the model) must be within [0,1]" error: [fmi2logger] [fmi2Error] /var/lib/jenkins1/ws/OpenModelicaLibraryTestingWork_2/OpenModelicaLibraryTesting/IDEAS_dev_IDEAS.Electrical.DC.Lines.Examples.DCLine/model-dwgrj79w/temp/0001_IDEAS_dev_IDEAS_Electrical_DC_Lines_Examples_DCLine/logFmi2Call: fmi2GetBoolean: terminated by an assertion. error: [updateSignals] failed to fetch variable load3.linearized error: [SimulateSingleFMU] oms_simulate failed info: Final Statistics for 'model.root': NumSteps = 1251 NumRhsEvals = 1252 NumLinSolvSetups = 64 NumNonlinSolvIters = 1251 NumNonlinSolvConvFails = 0 NumErrTestFails = 0 info: 3 warnings info: 5 errors