Running: ./testmodel.py --libraries=/home/hudson/saved_omc/libraries/.openmodelica/libraries/ --ompython_omhome=/usr Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.conf.json
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo", uses=false)
Using package ModelicaServices with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo)
Using package Modelica with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo)
Using package Complex with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo)
Running command: translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="mat",numberOfIntervals=5000,variableFilter="time|dLATREGSRL.delay.inertialDelaySensitive.1..x|dLATREGSRL.delay.inertialDelaySensitive.1..y|dLATREGSRL.delay.inertialDelaySensitive.2..x|dLATREGSRL.delay.inertialDelaySensitive.2..y",fileNamePrefix="Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL")
translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="mat",numberOfIntervals=5000,variableFilter="time|dLATREGSRL.delay.inertialDelaySensitive.1..x|dLATREGSRL.delay.inertialDelaySensitive.1..y|dLATREGSRL.delay.inertialDelaySensitive.2..x|dLATREGSRL.delay.inertialDelaySensitive.2..y",fileNamePrefix="Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL")
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo): time 0.001481/0.001481, allocations: 185.9 kB / 16.4 MB, free: 5.75 MB / 13.93 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo): time 1.888/1.888, allocations: 205.4 MB / 222.5 MB, free: 9.125 MB / 186.7 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo): time 0.001154/0.001154, allocations: 84.75 kB / 270.9 MB, free: 8.375 MB / 218.7 MB
Notification: Performance of FrontEnd - loaded program: time 0.000546/0.0005461, allocations: 8 kB / 327 MB, free: 204 kB / 266.7 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 0.3347/0.3353, allocations: 47.57 MB / 374.5 MB, free: 45.41 MB / 298.7 MB
Notification: Performance of FrontEnd - scodeFlatten: time 0.1321/0.4674, allocations: 82.4 MB / 456.9 MB, free: 14.35 MB / 346.7 MB
Notification: Performance of FrontEnd - mkProgramGraph: time 0.0002661/0.4677, allocations: 67.97 kB / 457 MB, free: 14.29 MB / 346.7 MB
Notification: Performance of FrontEnd - DAE generated: time 0.1264/0.5941, allocations: 38.63 MB / 495.6 MB, free: 7.652 MB / 378.7 MB
Notification: Performance of FrontEnd: time 2.564e-06/0.5942, allocations: 0 / 495.6 MB, free: 7.652 MB / 378.7 MB
Notification: Performance of Transformations before backend: time 4.855e-05/0.5942, allocations: 20 kB / 495.6 MB, free: 7.633 MB / 378.7 MB
Notification: Model statistics after passing the front-end and creating the data structures used by the back-end:
 * Number of equations: 43
 * Number of variables: 43
Notification: Performance of Generate backend data structure: time 0.002401/0.5966, allocations: 1.516 MB / 497.2 MB, free: 6.012 MB / 378.7 MB
Notification: Performance of prepare preOptimizeDAE: time 4.878e-05/0.5967, allocations: 8.031 kB / 497.2 MB, free: 6.004 MB / 378.7 MB
Notification: Performance of preOpt normalInlineFunction (simulation): time 0.0003447/0.5971, allocations: 134.4 kB / 497.3 MB, free: 5.871 MB / 378.7 MB
Notification: Performance of preOpt evaluateParameters (simulation): time 0.001103/0.5982, allocations: 0.5171 MB / 497.8 MB, free: 5.305 MB / 378.7 MB
Notification: Performance of preOpt simplifyIfEquations (simulation): time 6.64e-05/0.5983, allocations: 20 kB / 497.8 MB, free: 5.285 MB / 378.7 MB
Notification: Performance of preOpt expandDerOperator (simulation): time 0.0001224/0.5984, allocations: 28 kB / 497.9 MB, free: 5.258 MB / 378.7 MB
Notification: Performance of preOpt clockPartitioning (simulation): time 0.001685/0.6001, allocations: 0.6306 MB / 498.5 MB, free: 4.621 MB / 378.7 MB
Notification: Performance of preOpt findStateOrder (simulation): time 1.793e-05/0.6001, allocations: 0 / 498.5 MB, free: 4.621 MB / 378.7 MB
Notification: Performance of preOpt replaceEdgeChange (simulation): time 9.845e-05/0.6002, allocations: 15.98 kB / 498.5 MB, free: 4.605 MB / 378.7 MB
Notification: Performance of preOpt inlineArrayEqn (simulation): time 8.806e-06/0.6003, allocations: 4 kB / 498.5 MB, free: 4.602 MB / 378.7 MB
Notification: Performance of preOpt removeEqualRHS (simulation): time 0.00124/0.6015, allocations: 483.6 kB / 499 MB, free: 4.129 MB / 378.7 MB
Notification: Performance of preOpt removeSimpleEquations (simulation): time 0.002948/0.6045, allocations: 1.166 MB / 0.4884 GB, free: 2.906 MB / 378.7 MB
Notification: Performance of preOpt comSubExp (simulation): time 0.00159/0.6061, allocations: 0.7014 MB / 0.4891 GB, free: 2.195 MB / 378.7 MB
Notification: Performance of preOpt evalFunc (simulation): time 1.623e-05/0.6062, allocations: 4 kB / 0.4891 GB, free: 2.191 MB / 378.7 MB
Notification: Performance of preOpt encapsulateWhenConditions (simulation): time 0.001608/0.6078, allocations: 0.7563 MB / 0.4899 GB, free: 1.395 MB / 378.7 MB
Notification: Performance of pre-optimization done (n=33): time 2.554e-06/0.6078, allocations: 0 / 0.4899 GB, free: 1.395 MB / 378.7 MB
Notification: Performance of matching and sorting (n=33): time 0.2685/0.8763, allocations: 2.121 MB / 0.4919 GB, free: 106.2 MB / 378.7 MB
Notification: Performance of inlineWhenForInitialization (initialization): time 0.0002903/0.8766, allocations: 333.4 kB / 0.4923 GB, free: 105.9 MB / 378.7 MB
Notification: Performance of selectInitializationVariablesDAE (initialization): time 0.004002/0.8806, allocations: 1.631 MB / 0.4938 GB, free: 105.5 MB / 378.7 MB
Notification: Performance of collectPreVariables (initialization): time 0.0002285/0.8809, allocations: 42.52 kB / 0.4939 GB, free: 105.5 MB / 378.7 MB
Notification: Performance of collectInitialEqns (initialization): time 0.0002631/0.8812, allocations: 260.7 kB / 0.4941 GB, free: 105.3 MB / 378.7 MB
Notification: Performance of collectInitialBindings (initialization): time 0.0001748/0.8814, allocations: 74.58 kB / 0.4942 GB, free: 105.3 MB / 378.7 MB
Notification: Performance of simplifyInitialFunctions (initialization): time 0.0001002/0.8815, allocations: 15.33 kB / 0.4942 GB, free: 105.3 MB / 378.7 MB
Notification: Performance of setup shared object (initialization): time 7.132e-05/0.8816, allocations: 320.8 kB / 0.4945 GB, free: 105 MB / 378.7 MB
Notification: Performance of preBalanceInitialSystem (initialization): time 0.001108/0.8827, allocations: 449.6 kB / 0.495 GB, free: 105 MB / 378.7 MB
Notification: Performance of partitionIndependentBlocks (initialization): time 0.001119/0.8838, allocations: 497.5 kB / 0.4954 GB, free: 104.9 MB / 378.7 MB
Notification: Performance of analyzeInitialSystem (initialization): time 0.001036/0.8849, allocations: 0.5923 MB / 0.496 GB, free: 104.7 MB / 378.7 MB
Notification: Performance of solveInitialSystemEqSystem (initialization): time 5.09e-06/0.8849, allocations: 0 / 0.496 GB, free: 104.7 MB / 378.7 MB
Notification: Performance of matching and sorting (n=37) (initialization): time 0.0029/0.8878, allocations: 1.31 MB / 0.4973 GB, free: 104.4 MB / 378.7 MB
Notification: Performance of prepare postOptimizeDAE: time 0.0002667/0.8881, allocations: 296.8 kB / 0.4976 GB, free: 104.1 MB / 378.7 MB
Notification: Performance of postOpt simplifyComplexFunction (initialization): time 1.013e-05/0.8882, allocations: 1.312 kB / 0.4976 GB, free: 104.1 MB / 378.7 MB
Notification: Performance of postOpt tearingSystem (initialization): time 2.169e-05/0.8882, allocations: 1.125 kB / 0.4976 GB, free: 104.1 MB / 378.7 MB
Notification: Performance of postOpt solveSimpleEquations (initialization): time 3.625e-05/0.8882, allocations: 4.312 kB / 0.4976 GB, free: 104.1 MB / 378.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (initialization): time 9.247e-06/0.8883, allocations: 6.469 kB / 0.4976 GB, free: 104.1 MB / 378.7 MB
Notification: Performance of postOpt simplifyAllExpressions (initialization): time 0.0006516/0.8889, allocations: 50.28 kB / 0.4976 GB, free: 104.1 MB / 378.7 MB
Notification: Performance of postOpt collapseArrayExpressions (initialization): time 0.0002418/0.8892, allocations: 121.9 kB / 0.4977 GB, free: 104.1 MB / 378.7 MB
Notification: Model statistics after passing the back-end for initialization:
 * Number of independent subsystems: 3
 * Number of states: 0 ()
 * Number of discrete variables: 37 ($PRE.dLATREGSRL.delay.inertialDelaySensitive[2].y,$PRE.dLATREGSRL.delay.inertialDelaySensitive[1].y,$whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,$PRE.dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,$PRE.dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2])
 * Number of discrete states: 0 ()
 * Number of clocked states: 0 ()
 * Top-level inputs: 0
Notification: Strong component statistics for initialization (16):
 * Single equations (assignments): 8
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of prepare postOptimizeDAE: time 0.001912/0.8911, allocations: 0.9917 MB / 0.4987 GB, free: 103.7 MB / 378.7 MB
Notification: Performance of postOpt lateInlineFunction (simulation): time 0.0002832/0.8914, allocations: 134.7 kB / 0.4988 GB, free: 103.6 MB / 378.7 MB
Notification: Performance of postOpt wrapFunctionCalls (simulation): time 0.0007252/0.8921, allocations: 253 kB / 0.4991 GB, free: 103.5 MB / 378.7 MB
Notification: Performance of postOpt inlineArrayEqn (simulation): time 5.961e-06/0.8922, allocations: 3.547 kB / 0.4991 GB, free: 103.5 MB / 378.7 MB
Notification: Performance of postOpt constantLinearSystem (simulation): time 7.023e-06/0.8922, allocations: 0 / 0.4991 GB, free: 103.5 MB / 378.7 MB
Notification: Performance of postOpt simplifysemiLinear (simulation): time 5.69e-06/0.8922, allocations: 5.203 kB / 0.4991 GB, free: 103.5 MB / 378.7 MB
Notification: Performance of postOpt removeSimpleEquations (simulation): time 0.005004/0.8972, allocations: 2.419 MB / 0.5015 GB, free: 102.8 MB / 378.7 MB
Notification: Performance of postOpt simplifyComplexFunction (simulation): time 6.332e-06/0.8973, allocations: 0 / 0.5015 GB, free: 102.8 MB / 378.7 MB
Notification: Performance of postOpt solveSimpleEquations (simulation): time 2.07e-05/0.8973, allocations: 8.578 kB / 0.5015 GB, free: 102.8 MB / 378.7 MB
Notification: Performance of postOpt tearingSystem (simulation): time 7.103e-06/0.8973, allocations: 3.031 kB / 0.5015 GB, free: 102.8 MB / 378.7 MB
Notification: Performance of postOpt inputDerivativesUsed (simulation): time 0.0001197/0.8974, allocations: 33.75 kB / 0.5015 GB, free: 102.8 MB / 378.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (simulation): time 5.099e-06/0.8974, allocations: 3.688 kB / 0.5015 GB, free: 102.8 MB / 378.7 MB
Notification: Performance of postOpt calculateStateSetsJacobians (simulation): time 2.184e-06/0.8975, allocations: 2.078 kB / 0.5015 GB, free: 102.8 MB / 378.7 MB
Notification: Performance of postOpt symbolicJacobian (simulation): time 0.003146/0.9006, allocations: 1.657 MB / 0.5031 GB, free: 102.2 MB / 378.7 MB
Notification: Performance of postOpt removeConstants (simulation): time 0.001671/0.9023, allocations: 0.677 MB / 0.5038 GB, free: 101.8 MB / 378.7 MB
Notification: Performance of postOpt simplifyTimeIndepFuncCalls (simulation): time 0.0002856/0.9026, allocations: 66.25 kB / 0.5038 GB, free: 101.8 MB / 378.7 MB
Notification: Performance of postOpt simplifyAllExpressions (simulation): time 0.0005825/0.9032, allocations: 41.47 kB / 0.5039 GB, free: 101.8 MB / 378.7 MB
Notification: Performance of postOpt findZeroCrossings (simulation): time 0.0008778/0.9041, allocations: 372.4 kB / 0.5042 GB, free: 101.7 MB / 378.7 MB
Notification: Performance of postOpt collapseArrayExpressions (simulation): time 0.0002053/0.9044, allocations: 135.1 kB / 0.5044 GB, free: 101.7 MB / 378.7 MB
Notification: Performance of sorting global known variables: time 0.002791/0.9072, allocations: 1.347 MB / 0.5057 GB, free: 101.1 MB / 378.7 MB
Notification: Performance of sort global known variables: time 8.22e-07/0.9072, allocations: 0 / 0.5057 GB, free: 101.1 MB / 378.7 MB
Notification: Performance of remove unused functions: time 0.0008298/0.908, allocations: 151.5 kB / 0.5058 GB, free: 101.1 MB / 378.7 MB
Notification: Model statistics after passing the back-end for simulation:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 33 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2])
 * Number of discrete states: 31 (enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.next_assign_val[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,$whenCondition2,$whenCondition1,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,$whenCondition4,$whenCondition3,dLATREGSRL.delay.inertialDelaySensitive[1].x)
 * Number of clocked states: 0 ()
 * Top-level inputs: 0
Notification: Strong component statistics for simulation (12):
 * Single equations (assignments): 4
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of Backend phase and start with SimCode phase: time 0.0003311/0.9084, allocations: 189.5 kB / 0.506 GB, free: 100.9 MB / 378.7 MB
Notification: Performance of simCode: created initialization part: time 0.002928/0.9113, allocations: 1.93 MB / 0.5079 GB, free: 99.8 MB / 378.7 MB
Notification: Performance of simCode: created event and clocks part: time 5.119e-06/0.9114, allocations: 3.844 kB / 0.5079 GB, free: 99.8 MB / 378.7 MB
Notification: Performance of simCode: created simulation system equations: time 0.001864/0.9132, allocations: 1.445 MB / 0.5093 GB, free: 98.79 MB / 378.7 MB
Notification: Performance of simCode: created of all other equations (e.g. parameter, nominal, assert, etc): time 0.001901/0.9152, allocations: 299.1 kB / 0.5096 GB, free: 98.73 MB / 378.7 MB
Notification: Performance of simCode: created linear, non-linear and system jacobian parts: time 0.00619/0.9214, allocations: 3.256 MB / 0.5128 GB, free: 97.11 MB / 378.7 MB
Notification: Performance of simCode: some other stuff during SimCode phase: time 0.001233/0.9227, allocations: 1.218 MB / 0.514 GB, free: 96.26 MB / 378.7 MB
Notification: Performance of simCode: all other stuff during SimCode phase: time 4.776e-05/0.9228, allocations: 15.44 kB / 0.514 GB, free: 96.25 MB / 378.7 MB
Notification: Performance of SimCode: time 1.012e-06/0.9228, allocations: 0 / 0.514 GB, free: 96.25 MB / 378.7 MB
Notification: Performance of Templates: time 0.01776/0.9405, allocations: 10.12 MB / 0.5239 GB, free: 89.29 MB / 378.7 MB
make -j1 -f Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.makefile
(rm -f Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe ; mkfifo Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe ; head -c 1048576 < Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe >> ../files/Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.sim & ./Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL  --alarm=480   -emit_protected > Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe 2>&1)
diffSimulationResults("Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL_res.mat","/var/lib/jenkins1/ws/OpenModelicaLibraryTestingWork/Reference-modelica.org/ReferenceResults/MAP-LIB_ReferenceResults/v3.2.3+build.4/Modelica/Electrical/Digital/Examples/DLATREGSRL/DLATREGSRL.csv","../files/Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.diff",relTol=0.003,relTolDiffMinMax=0.003,rangeDelta=0.001)
""

Variables in the reference:time,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y

Variables in the result:dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable,dLATREGSRL.dLATSR.n,dLATREGSRL.dLATSR.reset,dLATREGSRL.dLATSR.set,dLATREGSRL.dLATSR.strength,dLATREGSRL.dataIn[1],dLATREGSRL.dataIn[2],dLATREGSRL.dataOut[1],dLATREGSRL.dataOut[2],dLATREGSRL.delay.inertialDelaySensitive[1].tHL,dLATREGSRL.delay.inertialDelaySensitive[1].tLH,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y0,dLATREGSRL.delay.inertialDelaySensitive[2].tHL,dLATREGSRL.delay.inertialDelaySensitive[2].tLH,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y0,dLATREGSRL.delay.n,dLATREGSRL.delay.tHL,dLATREGSRL.delay.tLH,dLATREGSRL.delay.x[1],dLATREGSRL.delay.x[2],dLATREGSRL.delay.y[1],dLATREGSRL.delay.y[2],dLATREGSRL.enable,dLATREGSRL.n,dLATREGSRL.reset,dLATREGSRL.set,dLATREGSRL.strength,dLATREGSRL.tHL,dLATREGSRL.tLH,data_0.n,data_0.t[1],data_0.t[2],data_0.x[1],data_0.x[2],data_0.y,data_0.y0,data_1.n,data_1.t[1],data_1.t[2],data_1.x[1],data_1.x[2],data_1.y,data_1.y0,enable.n,enable.t[1],enable.t[2],enable.t[3],enable.x[1],enable.x[2],enable.x[3],enable.y,enable.y0,reset.n,reset.t[1],reset.t[2],reset.t[3],reset.t[4],reset.t[5],reset.x[1],reset.x[2],reset.x[3],reset.x[4],reset.x[5],reset.y,reset.y0,set.n,set.t[1],set.t[2],set.t[3],set.x[1],set.x[2],set.x[3],set.y,set.y0,time