Running: ./testmodel.py --libraries=/home/hudson/saved_omc/libraries/.openmodelica/libraries/ --ompython_omhome=/usr Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.conf.json
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo", uses=false)
Using package ModelicaServices with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo)
Using package Modelica with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo)
Using package Complex with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo)
Running command: translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="mat",numberOfIntervals=5000,variableFilter="time|dLATREGSRL.delay.inertialDelaySensitive.1..x|dLATREGSRL.delay.inertialDelaySensitive.1..y|dLATREGSRL.delay.inertialDelaySensitive.2..x|dLATREGSRL.delay.inertialDelaySensitive.2..y",fileNamePrefix="Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL")
translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="mat",numberOfIntervals=5000,variableFilter="time|dLATREGSRL.delay.inertialDelaySensitive.1..x|dLATREGSRL.delay.inertialDelaySensitive.1..y|dLATREGSRL.delay.inertialDelaySensitive.2..x|dLATREGSRL.delay.inertialDelaySensitive.2..y",fileNamePrefix="Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL")
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo): time 0.00211/0.00211, allocations: 181.6 kB / 13.66 MB, free: 1.664 MB / 13.93 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo): time 2.002/2.002, allocations: 205.2 MB / 219.4 MB, free: 14.29 MB / 186.7 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo): time 0.001049/0.001049, allocations: 86.64 kB / 267.5 MB, free: 14.11 MB / 234.7 MB
Notification: Performance of FrontEnd - loaded program: time 3.687e-05/3.701e-05, allocations: 4 kB / 321.5 MB, free: 17.85 MB / 234.7 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 0.1069/0.107, allocations: 47.57 MB / 369.1 MB, free: 2.207 MB / 266.7 MB
Notification: Performance of FrontEnd - scodeFlatten: time 0.4557/0.5628, allocations: 82.3 MB / 451.4 MB, free: 10.82 MB / 330.7 MB
Notification: Performance of FrontEnd - mkProgramGraph: time 0.0002531/0.5631, allocations: 68.83 kB / 451.5 MB, free: 10.79 MB / 330.7 MB
Notification: Performance of FrontEnd - DAE generated: time 0.1312/0.6943, allocations: 38.81 MB / 490.3 MB, free: 6.023 MB / 362.7 MB
Notification: Performance of FrontEnd: time 2.455e-06/0.6944, allocations: 0 / 490.3 MB, free: 6.023 MB / 362.7 MB
Notification: Performance of Transformations before backend: time 4.923e-05/0.6945, allocations: 20 kB / 490.3 MB, free: 6.004 MB / 362.7 MB
Notification: Model statistics after passing the front-end and creating the data structures used by the back-end:
 * Number of equations: 43
 * Number of variables: 43
Notification: Performance of Generate backend data structure: time 0.002048/0.6965, allocations: 1.315 MB / 491.6 MB, free: 4.59 MB / 362.7 MB
Notification: Performance of prepare preOptimizeDAE: time 6.308e-05/0.6966, allocations: 12.03 kB / 491.6 MB, free: 4.578 MB / 362.7 MB
Notification: Performance of preOpt normalInlineFunction (simulation): time 0.0002985/0.6969, allocations: 130.4 kB / 491.7 MB, free: 4.449 MB / 362.7 MB
Notification: Performance of preOpt evaluateParameters (simulation): time 0.00116/0.6981, allocations: 0.5055 MB / 492.2 MB, free: 3.895 MB / 362.7 MB
Notification: Performance of preOpt simplifyIfEquations (simulation): time 7.104e-05/0.6982, allocations: 24 kB / 492.3 MB, free: 3.871 MB / 362.7 MB
Notification: Performance of preOpt expandDerOperator (simulation): time 0.0001267/0.6983, allocations: 31.98 kB / 492.3 MB, free: 3.84 MB / 362.7 MB
Notification: Performance of preOpt clockPartitioning (simulation): time 0.001627/0.6999, allocations: 0.6183 MB / 492.9 MB, free: 3.215 MB / 362.7 MB
Notification: Performance of preOpt findStateOrder (simulation): time 1.314e-05/0.7, allocations: 3.938 kB / 492.9 MB, free: 3.211 MB / 362.7 MB
Notification: Performance of preOpt replaceEdgeChange (simulation): time 0.0001005/0.7001, allocations: 19.98 kB / 492.9 MB, free: 3.191 MB / 362.7 MB
Notification: Performance of preOpt inlineArrayEqn (simulation): time 7.464e-06/0.7001, allocations: 0 / 492.9 MB, free: 3.191 MB / 362.7 MB
Notification: Performance of preOpt removeEqualRHS (simulation): time 0.001192/0.7013, allocations: 471.7 kB / 493.4 MB, free: 2.73 MB / 362.7 MB
Notification: Performance of preOpt removeSimpleEquations (simulation): time 0.003212/0.7046, allocations: 1.178 MB / 494.6 MB, free: 1.496 MB / 362.7 MB
Notification: Performance of preOpt comSubExp (simulation): time 0.001553/0.7062, allocations: 0.6976 MB / 495.3 MB, free: 0.7891 MB / 362.7 MB
Notification: Performance of preOpt resolveLoops (simulation): time 0.001402/0.7076, allocations: 0.6764 MB / 496 MB, free: 112 kB / 362.7 MB
Notification: Performance of preOpt evalFunc (simulation): time 1.855e-05/0.7077, allocations: 4 kB / 496 MB, free: 108 kB / 362.7 MB
Notification: Performance of preOpt encapsulateWhenConditions (simulation): time 0.001636/0.7093, allocations: 0.7368 MB / 496.7 MB, free: 15.33 MB / 378.7 MB
Notification: Performance of pre-optimization done (n=33): time 3.467e-06/0.7093, allocations: 0 / 496.7 MB, free: 15.33 MB / 378.7 MB
Notification: Performance of matching and sorting (n=33): time 0.003463/0.7128, allocations: 1.418 MB / 498.1 MB, free: 13.86 MB / 378.7 MB
Notification: Performance of inlineWhenForInitialization (initialization): time 0.00039/0.7133, allocations: 328.9 kB / 498.4 MB, free: 13.47 MB / 378.7 MB
Notification: Performance of selectInitializationVariablesDAE (initialization): time 0.004584/0.7179, allocations: 1.619 MB / 0.4883 GB, free: 11.84 MB / 378.7 MB
Notification: Performance of collectPreVariables (initialization): time 0.0002496/0.7182, allocations: 41.7 kB / 0.4884 GB, free: 11.79 MB / 378.7 MB
Notification: Performance of collectInitialEqns (initialization): time 0.0003515/0.7186, allocations: 260.9 kB / 0.4886 GB, free: 11.54 MB / 378.7 MB
Notification: Performance of collectInitialBindings (initialization): time 0.0001799/0.7188, allocations: 75.16 kB / 0.4887 GB, free: 11.46 MB / 378.7 MB
Notification: Performance of simplifyInitialFunctions (initialization): time 8.175e-05/0.7189, allocations: 12 kB / 0.4887 GB, free: 11.45 MB / 378.7 MB
Notification: Performance of setup shared object (initialization): time 0.0001631/0.719, allocations: 322.9 kB / 0.489 GB, free: 11.12 MB / 378.7 MB
Notification: Performance of preBalanceInitialSystem (initialization): time 0.001101/0.7201, allocations: 455.7 kB / 0.4895 GB, free: 10.68 MB / 378.7 MB
Notification: Performance of partitionIndependentBlocks (initialization): time 0.001078/0.7212, allocations: 467.5 kB / 0.4899 GB, free: 10.22 MB / 378.7 MB
Notification: Performance of analyzeInitialSystem (initialization): time 0.00101/0.7223, allocations: 0.584 MB / 0.4905 GB, free: 9.59 MB / 378.7 MB
Notification: Performance of solveInitialSystemEqSystem (initialization): time 3.717e-06/0.7223, allocations: 0 / 0.4905 GB, free: 9.59 MB / 378.7 MB
Notification: Performance of matching and sorting (n=37) (initialization): time 0.003013/0.7253, allocations: 1.295 MB / 0.4917 GB, free: 8.238 MB / 378.7 MB
Notification: Performance of prepare postOptimizeDAE: time 0.0003746/0.7257, allocations: 297.5 kB / 0.492 GB, free: 7.898 MB / 378.7 MB
Notification: Performance of postOpt simplifyComplexFunction (initialization): time 8.897e-06/0.7258, allocations: 0 / 0.492 GB, free: 7.898 MB / 378.7 MB
Notification: Performance of postOpt tearingSystem (initialization): time 2.158e-05/0.7258, allocations: 4 kB / 0.492 GB, free: 7.895 MB / 378.7 MB
Notification: Performance of postOpt solveSimpleEquations (initialization): time 4.093e-05/0.7259, allocations: 4 kB / 0.492 GB, free: 7.891 MB / 378.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (initialization): time 1.201e-05/0.7259, allocations: 3.953 kB / 0.492 GB, free: 7.887 MB / 378.7 MB
Notification: Performance of postOpt simplifyAllExpressions (initialization): time 0.0007558/0.7266, allocations: 47.81 kB / 0.4921 GB, free: 7.84 MB / 378.7 MB
Notification: Performance of postOpt collapseArrayExpressions (initialization): time 0.0002656/0.7269, allocations: 128.2 kB / 0.4922 GB, free: 7.715 MB / 378.7 MB
Notification: Model statistics after passing the back-end for initialization:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 37 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,$PRE.dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].x,$PRE.dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,$PRE.dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].x,$PRE.dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2])
 * Number of discrete states: 0 ()
 * Top-level inputs: 0
Notification: Strong component statistics for initialization (16):
 * Single equations (assignments): 8
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of prepare postOptimizeDAE: time 0.0007008/0.7276, allocations: 451.8 kB / 0.4926 GB, free: 7.215 MB / 378.7 MB
Notification: Performance of postOpt lateInlineFunction (simulation): time 0.0003107/0.728, allocations: 142.4 kB / 0.4928 GB, free: 7.074 MB / 378.7 MB
Notification: Performance of postOpt wrapFunctionCalls (simulation): time 0.0008253/0.7288, allocations: 252 kB / 0.493 GB, free: 6.824 MB / 378.7 MB
Notification: Performance of postOpt inlineArrayEqn (simulation): time 7.494e-06/0.7288, allocations: 3.984 kB / 0.493 GB, free: 6.82 MB / 378.7 MB
Notification: Performance of postOpt constantLinearSystem (simulation): time 7.023e-06/0.7288, allocations: 0 / 0.493 GB, free: 6.82 MB / 378.7 MB
Notification: Performance of postOpt simplifysemiLinear (simulation): time 7.143e-06/0.7289, allocations: 3.953 kB / 0.493 GB, free: 6.816 MB / 378.7 MB
Notification: Performance of postOpt removeSimpleEquations (simulation): time 0.005167/0.734, allocations: 2.399 MB / 0.4954 GB, free: 4.305 MB / 378.7 MB
Notification: Performance of postOpt simplifyComplexFunction (simulation): time 7.895e-06/0.7341, allocations: 3.984 kB / 0.4954 GB, free: 4.301 MB / 378.7 MB
Notification: Performance of postOpt solveSimpleEquations (simulation): time 2.526e-05/0.7341, allocations: 4 kB / 0.4954 GB, free: 4.297 MB / 378.7 MB
Notification: Performance of postOpt tearingSystem (simulation): time 9.438e-06/0.7342, allocations: 4 kB / 0.4954 GB, free: 4.293 MB / 378.7 MB
Notification: Performance of postOpt inputDerivativesUsed (simulation): time 0.000127/0.7343, allocations: 35.92 kB / 0.4954 GB, free: 4.258 MB / 378.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (simulation): time 3.837e-06/0.7343, allocations: 0 / 0.4954 GB, free: 4.258 MB / 378.7 MB
Notification: Performance of postOpt calculateStateSetsJacobians (simulation): time 4.759e-06/0.7343, allocations: 7.891 kB / 0.4954 GB, free: 4.25 MB / 378.7 MB
Notification: Performance of postOpt symbolicJacobian (simulation): time 0.00351/0.7379, allocations: 1.638 MB / 0.497 GB, free: 2.543 MB / 378.7 MB
Notification: Performance of postOpt removeConstants (simulation): time 0.002133/0.74, allocations: 0.6708 MB / 0.4977 GB, free: 1.852 MB / 378.7 MB
Notification: Performance of postOpt simplifyTimeIndepFuncCalls (simulation): time 0.0003195/0.7404, allocations: 59.97 kB / 0.4977 GB, free: 1.793 MB / 378.7 MB
Notification: Performance of postOpt simplifyAllExpressions (simulation): time 0.0006589/0.7411, allocations: 43.95 kB / 0.4978 GB, free: 1.75 MB / 378.7 MB
Notification: Performance of postOpt findZeroCrossings (simulation): time 0.00105/0.7421, allocations: 375.6 kB / 0.4981 GB, free: 1.383 MB / 378.7 MB
Notification: Performance of postOpt collapseArrayExpressions (simulation): time 0.0002941/0.7425, allocations: 128 kB / 0.4982 GB, free: 1.258 MB / 378.7 MB
Notification: Performance of sorting global known variables: time 0.003424/0.7459, allocations: 1.336 MB / 0.4995 GB, free: 15.91 MB / 394.7 MB
Notification: Performance of sort global known variables: time 5.71e-07/0.7459, allocations: 0 / 0.4995 GB, free: 15.91 MB / 394.7 MB
Notification: Performance of remove unused functions: time 0.000947/0.7469, allocations: 152 kB / 0.4997 GB, free: 15.77 MB / 394.7 MB
Notification: Model statistics after passing the back-end for simulation:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 33 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2])
 * Number of discrete states: 31 (enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.next_assign_val[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,$whenCondition2,$whenCondition1,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,$whenCondition4,$whenCondition3,dLATREGSRL.delay.inertialDelaySensitive[1].x)
 * Top-level inputs: 0
Notification: Strong component statistics for simulation (12):
 * Single equations (assignments): 4
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of Backend phase and start with SimCode phase: time 0.0004034/0.7473, allocations: 189.7 kB / 0.4999 GB, free: 15.57 MB / 394.7 MB
Notification: Performance of simCode: created initialization part: time 0.003688/0.751, allocations: 1.917 MB / 0.5017 GB, free: 13.55 MB / 394.7 MB
Notification: Performance of simCode: created event and clocks part: time 5.12e-06/0.7511, allocations: 0 / 0.5017 GB, free: 13.55 MB / 394.7 MB
Notification: Performance of simCode: created simulation system equations: time 0.002493/0.7536, allocations: 1.436 MB / 0.5031 GB, free: 12.02 MB / 394.7 MB
Notification: Performance of simCode: created of all other equations (e.g. parameter, nominal, assert, etc): time 0.00221/0.7558, allocations: 296.4 kB / 0.5034 GB, free: 11.73 MB / 394.7 MB
Notification: Performance of simCode: created linear, non-linear and system jacobian parts: time 0.006798/0.7627, allocations: 2.628 MB / 0.506 GB, free: 9.066 MB / 394.7 MB
Notification: Performance of simCode: some other stuff during SimCode phase: time 0.001631/0.7644, allocations: 1.219 MB / 0.5072 GB, free: 7.816 MB / 394.7 MB
Notification: Performance of simCode: all other stuff during SimCode phase: time 6.318e-05/0.7645, allocations: 19.44 kB / 0.5072 GB, free: 7.797 MB / 394.7 MB
Notification: Performance of SimCode: time 1.122e-06/0.7645, allocations: 0 / 0.5072 GB, free: 7.797 MB / 394.7 MB
Notification: Performance of Templates: time 0.02339/0.7879, allocations: 10.1 MB / 0.5171 GB, free: 13.49 MB / 410.7 MB
make -j1 -f Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.makefile
(rm -f Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe ; mkfifo Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe ; head -c 1048576 < Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe >> ../files/Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.sim & ./Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL  --alarm=480   -emit_protected > Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe 2>&1)
diffSimulationResults("Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL_res.mat","/var/lib/jenkins1/ws/OpenModelicaLibraryTestingWork/Reference-modelica.org/ReferenceResults/MAP-LIB_ReferenceResults/v3.2.3+build.4/Modelica/Electrical/Digital/Examples/DLATREGSRL/DLATREGSRL.csv","../files/Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.diff",relTol=0.003,relTolDiffMinMax=0.003,rangeDelta=0.001)
""

Variables in the reference:time,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y

Variables in the result:dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable,dLATREGSRL.dLATSR.n,dLATREGSRL.dLATSR.reset,dLATREGSRL.dLATSR.set,dLATREGSRL.dLATSR.strength,dLATREGSRL.dataIn[1],dLATREGSRL.dataIn[2],dLATREGSRL.dataOut[1],dLATREGSRL.dataOut[2],dLATREGSRL.delay.inertialDelaySensitive[1].tHL,dLATREGSRL.delay.inertialDelaySensitive[1].tLH,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y0,dLATREGSRL.delay.inertialDelaySensitive[2].tHL,dLATREGSRL.delay.inertialDelaySensitive[2].tLH,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y0,dLATREGSRL.delay.n,dLATREGSRL.delay.tHL,dLATREGSRL.delay.tLH,dLATREGSRL.delay.x[1],dLATREGSRL.delay.x[2],dLATREGSRL.delay.y[1],dLATREGSRL.delay.y[2],dLATREGSRL.enable,dLATREGSRL.n,dLATREGSRL.reset,dLATREGSRL.set,dLATREGSRL.strength,dLATREGSRL.tHL,dLATREGSRL.tLH,data_0.n,data_0.t[1],data_0.t[2],data_0.x[1],data_0.x[2],data_0.y,data_0.y0,data_1.n,data_1.t[1],data_1.t[2],data_1.x[1],data_1.x[2],data_1.y,data_1.y0,enable.n,enable.t[1],enable.t[2],enable.t[3],enable.x[1],enable.x[2],enable.x[3],enable.y,enable.y0,reset.n,reset.t[1],reset.t[2],reset.t[3],reset.t[4],reset.t[5],reset.x[1],reset.x[2],reset.x[3],reset.x[4],reset.x[5],reset.y,reset.y0,set.n,set.t[1],set.t[2],set.t[3],set.x[1],set.x[2],set.x[3],set.y,set.y0,time