Running: ./testmodel.py --libraries=/home/hudson/saved_omc/libraries/.openmodelica/libraries/ --ompython_omhome=/usr Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.conf.json
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo", uses=false)
Using package ModelicaServices with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo)
Using package Modelica with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo)
Using package Complex with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo)
Running command: translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="mat",numberOfIntervals=5000,variableFilter="time|dLATREGSRL.delay.inertialDelaySensitive.1..x|dLATREGSRL.delay.inertialDelaySensitive.1..y|dLATREGSRL.delay.inertialDelaySensitive.2..x|dLATREGSRL.delay.inertialDelaySensitive.2..y",fileNamePrefix="Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL")
translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="mat",numberOfIntervals=5000,variableFilter="time|dLATREGSRL.delay.inertialDelaySensitive.1..x|dLATREGSRL.delay.inertialDelaySensitive.1..y|dLATREGSRL.delay.inertialDelaySensitive.2..x|dLATREGSRL.delay.inertialDelaySensitive.2..y",fileNamePrefix="Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL")
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo): time 0.001486/0.001486, allocations: 179.2 kB / 8.363 MB, free: 0.7148 MB / 5.871 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo): time 1.984/1.984, allocations: 205.3 MB / 214.1 MB, free: 14.14 MB / 187.1 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo): time 0.002028/0.002028, allocations: 100 kB / 262.1 MB, free: 13.88 MB / 219.1 MB
Notification: Performance of FrontEnd - loaded program: time 2.346e-05/2.359e-05, allocations: 4 kB / 314.8 MB, free: 9.172 MB / 267.1 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 0.3424/0.3424, allocations: 47.57 MB / 362.3 MB, free: 45.81 MB / 299.1 MB
Notification: Performance of FrontEnd - scodeFlatten: time 0.1305/0.4729, allocations: 81.64 MB / 444 MB, free: 4.656 MB / 331.1 MB
Notification: Performance of FrontEnd - mkProgramGraph: time 0.0002755/0.4733, allocations: 70.92 kB / 444 MB, free: 4.59 MB / 331.1 MB
Notification: Performance of FrontEnd - DAE generated: time 0.1316/0.6049, allocations: 38.57 MB / 482.6 MB, free: 14.12 MB / 379.1 MB
Notification: Performance of FrontEnd: time 2.505e-06/0.6049, allocations: 4 kB / 482.6 MB, free: 14.11 MB / 379.1 MB
Notification: Performance of Transformations before backend: time 4.85e-05/0.605, allocations: 20 kB / 482.6 MB, free: 14.09 MB / 379.1 MB
Notification: Model statistics after passing the front-end and creating the data structures used by the back-end:
 * Number of equations: 43
 * Number of variables: 43
Notification: Performance of Generate backend data structure: time 0.002252/0.6072, allocations: 1.317 MB / 484 MB, free: 12.68 MB / 379.1 MB
Notification: Performance of prepare preOptimizeDAE: time 5.301e-05/0.6073, allocations: 8.031 kB / 484 MB, free: 12.67 MB / 379.1 MB
Notification: Performance of preOpt normalInlineFunction (simulation): time 0.0003988/0.6077, allocations: 138.3 kB / 484.1 MB, free: 12.54 MB / 379.1 MB
Notification: Performance of preOpt evaluateParameters (simulation): time 0.001353/0.6091, allocations: 0.5094 MB / 484.6 MB, free: 11.98 MB / 379.1 MB
Notification: Performance of preOpt simplifyIfEquations (simulation): time 6.514e-05/0.6092, allocations: 16 kB / 484.6 MB, free: 11.96 MB / 379.1 MB
Notification: Performance of preOpt expandDerOperator (simulation): time 0.0001269/0.6093, allocations: 24 kB / 484.6 MB, free: 11.94 MB / 379.1 MB
Notification: Performance of preOpt removeEqualFunctionCalls (simulation): time 0.001098/0.6104, allocations: 466.5 kB / 485.1 MB, free: 11.48 MB / 379.1 MB
Notification: Performance of preOpt clockPartitioning (simulation): time 0.001389/0.6118, allocations: 0.5793 MB / 485.7 MB, free: 10.9 MB / 379.1 MB
Notification: Performance of preOpt findStateOrder (simulation): time 1.44e-05/0.6119, allocations: 4 kB / 485.7 MB, free: 10.89 MB / 379.1 MB
Notification: Performance of preOpt replaceEdgeChange (simulation): time 9.365e-05/0.612, allocations: 8 kB / 485.7 MB, free: 10.89 MB / 379.1 MB
Notification: Performance of preOpt inlineArrayEqn (simulation): time 9.848e-06/0.612, allocations: 4 kB / 485.7 MB, free: 10.88 MB / 379.1 MB
Notification: Performance of preOpt removeSimpleEquations (simulation): time 0.003125/0.6151, allocations: 1.141 MB / 486.8 MB, free: 9.699 MB / 379.1 MB
Notification: Performance of preOpt comSubExp (simulation): time 0.001611/0.6168, allocations: 0.6742 MB / 487.5 MB, free: 9.016 MB / 379.1 MB
Notification: Performance of preOpt resolveLoops (simulation): time 0.001355/0.6182, allocations: 0.6569 MB / 488.2 MB, free: 8.355 MB / 379.1 MB
Notification: Performance of preOpt evalFunc (simulation): time 1.419e-05/0.6183, allocations: 4 kB / 488.2 MB, free: 8.352 MB / 379.1 MB
Notification: Performance of preOpt encapsulateWhenConditions (simulation): time 0.001547/0.6198, allocations: 0.7407 MB / 488.9 MB, free: 7.57 MB / 379.1 MB
Notification: Performance of pre-optimization done (n=33): time 4.047e-06/0.6198, allocations: 0 / 488.9 MB, free: 7.57 MB / 379.1 MB
Notification: Performance of matching and sorting (n=33): time 0.002887/0.6227, allocations: 1.096 MB / 490 MB, free: 6.469 MB / 379.1 MB
Notification: Performance of inlineWhenForInitialization (initialization): time 0.00031/0.6231, allocations: 325 kB / 490.3 MB, free: 6.09 MB / 379.1 MB
Notification: Performance of selectInitializationVariablesDAE (initialization): time 0.004019/0.6271, allocations: 1.558 MB / 491.9 MB, free: 4.52 MB / 379.1 MB
Notification: Performance of collectPreVariables (initialization): time 0.0002491/0.6274, allocations: 45.69 kB / 491.9 MB, free: 4.469 MB / 379.1 MB
Notification: Performance of collectInitialEqns (initialization): time 0.000349/0.6278, allocations: 252.9 kB / 492.2 MB, free: 4.219 MB / 379.1 MB
Notification: Performance of collectInitialBindings (initialization): time 0.0001963/0.628, allocations: 75.17 kB / 492.3 MB, free: 4.145 MB / 379.1 MB
Notification: Performance of simplifyInitialFunctions (initialization): time 8.539e-05/0.6281, allocations: 11.98 kB / 492.3 MB, free: 4.133 MB / 379.1 MB
Notification: Performance of setup shared object (initialization): time 0.0001935/0.6283, allocations: 330.8 kB / 492.6 MB, free: 3.801 MB / 379.1 MB
Notification: Performance of preBalanceInitialSystem (initialization): time 0.001053/0.6294, allocations: 431.9 kB / 493 MB, free: 3.379 MB / 379.1 MB
Notification: Performance of partitionIndependentBlocks (initialization): time 0.0009884/0.6304, allocations: 443.7 kB / 493.4 MB, free: 2.945 MB / 379.1 MB
Notification: Performance of analyzeInitialSystem (initialization): time 0.0006894/0.6311, allocations: 288.4 kB / 493.7 MB, free: 2.664 MB / 379.1 MB
Notification: Performance of solveInitialSystemEqSystem (initialization): time 4.258e-06/0.6311, allocations: 0 / 493.7 MB, free: 2.664 MB / 379.1 MB
Notification: Performance of matching and sorting (n=37) (initialization): time 0.00259/0.6337, allocations: 0.9905 MB / 494.7 MB, free: 1.672 MB / 379.1 MB
Notification: Performance of prepare postOptimizeDAE: time 0.0003697/0.6341, allocations: 289.5 kB / 495 MB, free: 1.34 MB / 379.1 MB
Notification: Performance of postOpt simplifyComplexFunction (initialization): time 9.488e-06/0.6342, allocations: 0 / 495 MB, free: 1.34 MB / 379.1 MB
Notification: Performance of postOpt tearingSystem (initialization): time 2.616e-05/0.6342, allocations: 4 kB / 495 MB, free: 1.336 MB / 379.1 MB
Notification: Performance of postOpt solveSimpleEquations (initialization): time 4.107e-05/0.6343, allocations: 11.92 kB / 495 MB, free: 1.324 MB / 379.1 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (initialization): time 6.432e-06/0.6343, allocations: 0 / 495 MB, free: 1.324 MB / 379.1 MB
Notification: Performance of postOpt simplifyAllExpressions (initialization): time 0.0007075/0.635, allocations: 43.88 kB / 495.1 MB, free: 1.281 MB / 379.1 MB
Notification: Performance of postOpt collapseArrayExpressions (initialization): time 0.0002534/0.6353, allocations: 132.1 kB / 495.2 MB, free: 1.152 MB / 379.1 MB
Notification: Model statistics after passing the back-end for initialization:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 37 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,$PRE.dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].x,$PRE.dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,$PRE.dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].x,$PRE.dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2])
 * Number of discrete states: 0 ()
 * Top-level inputs: 0
Notification: Strong component statistics for initialization (16):
 * Single equations (assignments): 8
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of prepare postOptimizeDAE: time 0.0006775/0.636, allocations: 455.7 kB / 495.6 MB, free: 0.6484 MB / 379.1 MB
Notification: Performance of postOpt lateInlineFunction (simulation): time 0.000316/0.6363, allocations: 138.3 kB / 495.8 MB, free: 0.5117 MB / 379.1 MB
Notification: Performance of postOpt wrapFunctionCalls (simulation): time 0.0008464/0.6371, allocations: 252.3 kB / 496 MB, free: 268 kB / 379.1 MB
Notification: Performance of postOpt inlineArrayEqn (simulation): time 5.67e-06/0.6372, allocations: 4 kB / 496 MB, free: 264 kB / 379.1 MB
Notification: Performance of postOpt constantLinearSystem (simulation): time 7.163e-06/0.6372, allocations: 0 / 496 MB, free: 264 kB / 379.1 MB
Notification: Performance of postOpt simplifysemiLinear (simulation): time 5.37e-06/0.6372, allocations: 0 / 496 MB, free: 264 kB / 379.1 MB
Notification: Performance of postOpt removeSimpleEquations (simulation): time 0.005247/0.6425, allocations: 2.013 MB / 498 MB, free: 14.2 MB / 395.1 MB
Notification: Performance of postOpt simplifyComplexFunction (simulation): time 1.006e-05/0.6425, allocations: 3.938 kB / 498 MB, free: 14.19 MB / 395.1 MB
Notification: Performance of postOpt solveSimpleEquations (simulation): time 2.765e-05/0.6426, allocations: 0 / 498 MB, free: 14.19 MB / 395.1 MB
Notification: Performance of postOpt tearingSystem (simulation): time 8.997e-06/0.6426, allocations: 0 / 498 MB, free: 14.19 MB / 395.1 MB
Notification: Performance of postOpt inputDerivativesUsed (simulation): time 0.0001453/0.6428, allocations: 35.98 kB / 498.1 MB, free: 14.16 MB / 395.1 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (simulation): time 3.587e-06/0.6428, allocations: 11.88 kB / 498.1 MB, free: 14.14 MB / 395.1 MB
Notification: Performance of postOpt calculateStateSetsJacobians (simulation): time 4.208e-06/0.6428, allocations: 0 / 498.1 MB, free: 14.14 MB / 395.1 MB
Notification: Performance of postOpt symbolicJacobian (simulation): time 0.003258/0.6461, allocations: 1.285 MB / 499.4 MB, free: 12.84 MB / 395.1 MB
Notification: Performance of postOpt removeConstants (simulation): time 0.002254/0.6484, allocations: 0.6708 MB / 0.4883 GB, free: 12.15 MB / 395.1 MB
Notification: Performance of postOpt simplifyTimeIndepFuncCalls (simulation): time 0.0003649/0.6488, allocations: 63.95 kB / 0.4884 GB, free: 12.09 MB / 395.1 MB
Notification: Performance of postOpt simplifyAllExpressions (simulation): time 0.0006616/0.6495, allocations: 31.97 kB / 0.4884 GB, free: 12.05 MB / 395.1 MB
Notification: Performance of postOpt findZeroCrossings (simulation): time 0.001077/0.6506, allocations: 379.6 kB / 0.4888 GB, free: 11.68 MB / 395.1 MB
Notification: Performance of postOpt collapseArrayExpressions (simulation): time 0.0002711/0.6509, allocations: 131.9 kB / 0.4889 GB, free: 11.55 MB / 395.1 MB
Notification: Performance of sorting global known variables: time 0.003458/0.6544, allocations: 1.275 MB / 0.4901 GB, free: 10.28 MB / 395.1 MB
Notification: Performance of sort global known variables: time 1.312e-06/0.6544, allocations: 0 / 0.4901 GB, free: 10.28 MB / 395.1 MB
Notification: Performance of remove unused functions: time 0.001017/0.6554, allocations: 140 kB / 0.4903 GB, free: 10.14 MB / 395.1 MB
Notification: Model statistics after passing the back-end for simulation:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 33 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2])
 * Number of discrete states: 31 (enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.next_assign_val[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,$whenCondition2,$whenCondition1,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,$whenCondition4,$whenCondition3,dLATREGSRL.delay.inertialDelaySensitive[1].x)
 * Top-level inputs: 0
Notification: Strong component statistics for simulation (12):
 * Single equations (assignments): 4
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of Backend phase and start with SimCode phase: time 0.0004048/0.6559, allocations: 189.6 kB / 0.4905 GB, free: 9.949 MB / 395.1 MB
Notification: Performance of simCode: created initialization part: time 0.003392/0.6593, allocations: 1.874 MB / 0.4923 GB, free: 7.977 MB / 395.1 MB
Notification: Performance of simCode: created event and clocks part: time 5.49e-06/0.6593, allocations: 4 kB / 0.4923 GB, free: 7.973 MB / 395.1 MB
Notification: Performance of simCode: created simulation system equations: time 0.002306/0.6617, allocations: 1.413 MB / 0.4937 GB, free: 6.461 MB / 395.1 MB
Notification: Performance of simCode: created of all other equations (e.g. parameter, nominal, assert, etc): time 0.002232/0.664, allocations: 292.7 kB / 0.4939 GB, free: 6.176 MB / 395.1 MB
Notification: Performance of simCode: created linear, non-linear and system jacobian parts: time 0.006963/0.671, allocations: 2.593 MB / 0.4965 GB, free: 3.539 MB / 395.1 MB
Notification: Performance of simCode: some other stuff during SimCode phase: time 0.001747/0.6728, allocations: 1.223 MB / 0.4977 GB, free: 2.289 MB / 395.1 MB
Notification: Performance of simCode: all other stuff during SimCode phase: time 5.957e-05/0.6729, allocations: 15.44 kB / 0.4977 GB, free: 2.273 MB / 395.1 MB
Notification: Performance of SimCode: time 1.282e-06/0.6729, allocations: 0 / 0.4977 GB, free: 2.273 MB / 395.1 MB
Notification: Performance of Templates: time 0.3353/1.008, allocations: 10.08 MB / 0.5075 GB, free: 118.7 MB / 395.1 MB
make -j1 -f Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.makefile
(rm -f Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe ; mkfifo Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe ; head -c 1048576 < Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe >> ../files/Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.sim & ./Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL  --alarm=480   -emit_protected > Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe 2>&1)
diffSimulationResults("Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL_res.mat","/var/lib/jenkins1/ws/OpenModelicaLibraryTestingWork/Reference-modelica.org/ReferenceResults/MAP-LIB_ReferenceResults/v3.2.3+build.4/Modelica/Electrical/Digital/Examples/DLATREGSRL/DLATREGSRL.csv","../files/Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.diff",relTol=0.003,relTolDiffMinMax=0.003,rangeDelta=0.001)
""

Variables in the reference:time,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y

Variables in the result:_D_whenCondition1,_D_whenCondition2,_D_whenCondition3,_D_whenCondition4,dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable,dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.n,dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2],dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.reset,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.set,dLATREGSRL.dLATSR.strength,dLATREGSRL.dataIn[1],dLATREGSRL.dataIn[2],dLATREGSRL.dataOut[1],dLATREGSRL.dataOut[2],dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].tHL,dLATREGSRL.delay.inertialDelaySensitive[1].tLH,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y0,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].tHL,dLATREGSRL.delay.inertialDelaySensitive[2].tLH,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y0,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.n,dLATREGSRL.delay.tHL,dLATREGSRL.delay.tLH,dLATREGSRL.delay.x[1],dLATREGSRL.delay.x[2],dLATREGSRL.delay.y[1],dLATREGSRL.delay.y[2],dLATREGSRL.enable,dLATREGSRL.n,dLATREGSRL.reset,dLATREGSRL.set,dLATREGSRL.strength,dLATREGSRL.tHL,dLATREGSRL.tLH,data_0.n,data_0.t[1],data_0.t[2],data_0.x[1],data_0.x[2],data_0.y,data_0.y0,data_1.n,data_1.t[1],data_1.t[2],data_1.x[1],data_1.x[2],data_1.y,data_1.y0,enable.n,enable.t[1],enable.t[2],enable.t[3],enable.x[1],enable.x[2],enable.x[3],enable.y,enable.y0,reset.n,reset.t[1],reset.t[2],reset.t[3],reset.t[4],reset.t[5],reset.x[1],reset.x[2],reset.x[3],reset.x[4],reset.x[5],reset.y,reset.y0,set.n,set.t[1],set.t[2],set.t[3],set.x[1],set.x[2],set.x[3],set.y,set.y0,time