Notification: Performance of loadModel(Modelica_Synchronous): time 1.828/1.828, allocations: 206.2 MB / 212.5 MB, free: 9.523 MB / 184.6 MB
Notification: Performance of FrontEnd - loaded program: time 0.2298/2.058, allocations: 49.31 MB / 261.8 MB, free: 8.16 MB / 216.6 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 0.07473/2.132, allocations: 46.98 MB / 308.8 MB, free: 9.086 MB / 264.6 MB
[/var/lib/hudson/slave/workspace/OpenModelica_TEST_LIBS/OpenModelica/OMCompiler/build/lib/omlibrary/Modelica_Synchronous 0.92.1/WorkInProgress.mo:1467:7-1470:75:writable] Error: Class Modelica_LinearSystems2.Controller.SampleClock not found in scope Modelica_Synchronous.WorkInProgress.Tests.TestFIR_Step.
Error: Error occurred while flattening model Modelica_Synchronous.WorkInProgress.Tests.TestFIR_Step
Error: Internal error SimCode: The model Modelica_Synchronous.WorkInProgress.Tests.TestFIR_Step could not be translated to FMU