Running: ./testmodel.py --libraries=/home/hudson/saved_omc/libraries/.openmodelica/libraries/ --ompython_omhome=/usr Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.conf.json loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo", uses=false) loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo", uses=false) loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo", uses=false) Using package ModelicaServices with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo) Using package Modelica with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo) Using package Complex with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo) Running command: translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="mat",numberOfIntervals=5000,variableFilter="time|dLATREGSRL.delay.inertialDelaySensitive.1..x|dLATREGSRL.delay.inertialDelaySensitive.1..y|dLATREGSRL.delay.inertialDelaySensitive.2..x|dLATREGSRL.delay.inertialDelaySensitive.2..y",fileNamePrefix="Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL") translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="mat",numberOfIntervals=5000,variableFilter="time|dLATREGSRL.delay.inertialDelaySensitive.1..x|dLATREGSRL.delay.inertialDelaySensitive.1..y|dLATREGSRL.delay.inertialDelaySensitive.2..x|dLATREGSRL.delay.inertialDelaySensitive.2..y",fileNamePrefix="Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL") [:1:1-1:32:writable] Error: Class GC_set_max_heap_size not found in scope (looking for a function or record). Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 3.2.3+maint.om/package.mo): time 0.00375/0.003749, allocations: 176.3 kB / 8.151 MB, free: 2.215 MB / 5.871 MB Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo): time 1.977/1.977, allocations: 205.2 MB / 213.8 MB, free: 13.86 MB / 186.7 MB Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 3.2.3+maint.om/package.mo): time 0.001248/0.001247, allocations: 93.25 kB / 261.8 MB, free: 13.62 MB / 218.7 MB Notification: Performance of FrontEnd - loaded program: time 1.132e-05/1.142e-05, allocations: 4 kB / 314.3 MB, free: 9.047 MB / 266.7 MB Notification: Performance of FrontEnd - Absyn->SCode: time 0.2339/0.234, allocations: 47.55 MB / 361.8 MB, free: 45.63 MB / 298.7 MB Notification: Performance of FrontEnd - scodeFlatten: time 0.1229/0.3569, allocations: 81.58 MB / 443.4 MB, free: 4.469 MB / 330.7 MB Notification: Performance of FrontEnd - mkProgramGraph: time 0.0002284/0.3572, allocations: 71.97 kB / 443.5 MB, free: 4.398 MB / 330.7 MB Notification: Performance of FrontEnd: time 0.1394/0.4966, allocations: 37.94 MB / 481.4 MB, free: 14.56 MB / 378.7 MB Notification: Performance of Transformations before backend: time 4.639e-05/0.4967, allocations: 20 kB / 481.4 MB, free: 14.54 MB / 378.7 MB Notification: Model statistics after passing the front-end and creating the data structures used by the back-end: * Number of equations: 43 * Number of variables: 43 Notification: Performance of Generate backend data structure: time 0.001978/0.4987, allocations: 1.315 MB / 482.8 MB, free: 13.12 MB / 378.7 MB Notification: Performance of prepare preOptimizeDAE: time 4.512e-05/0.4988, allocations: 8.031 kB / 482.8 MB, free: 13.11 MB / 378.7 MB Notification: Performance of preOpt normalInlineFunction (simulation): time 0.0002901/0.4991, allocations: 130.4 kB / 482.9 MB, free: 12.98 MB / 378.7 MB Notification: Performance of preOpt evaluateParameters (simulation): time 0.001196/0.5003, allocations: 0.5172 MB / 483.4 MB, free: 12.42 MB / 378.7 MB Notification: Performance of preOpt simplifyIfEquations (simulation): time 6.333e-05/0.5004, allocations: 19.98 kB / 483.4 MB, free: 12.4 MB / 378.7 MB Notification: Performance of preOpt expandDerOperator (simulation): time 0.0001196/0.5005, allocations: 24 kB / 483.4 MB, free: 12.38 MB / 378.7 MB Notification: Performance of preOpt removeEqualFunctionCalls (simulation): time 0.001172/0.5017, allocations: 472.8 kB / 483.9 MB, free: 11.91 MB / 378.7 MB Notification: Performance of preOpt clockPartitioning (simulation): time 0.001462/0.5032, allocations: 0.6017 MB / 484.5 MB, free: 11.31 MB / 378.7 MB Notification: Performance of preOpt findStateOrder (simulation): time 1.107e-05/0.5032, allocations: 0 / 484.5 MB, free: 11.31 MB / 378.7 MB Notification: Performance of preOpt replaceEdgeChange (simulation): time 9.943e-05/0.5033, allocations: 15.97 kB / 484.5 MB, free: 11.29 MB / 378.7 MB Notification: Performance of preOpt inlineArrayEqn (simulation): time 1.052e-05/0.5033, allocations: 4 kB / 484.5 MB, free: 11.29 MB / 378.7 MB Notification: Performance of preOpt removeSimpleEquations (simulation): time 0.003189/0.5065, allocations: 1.164 MB / 485.7 MB, free: 10.08 MB / 378.7 MB Notification: Performance of preOpt comSubExp (simulation): time 0.001405/0.508, allocations: 0.6897 MB / 486.4 MB, free: 9.383 MB / 378.7 MB Notification: Performance of preOpt resolveLoops (simulation): time 0.001308/0.5093, allocations: 0.6764 MB / 487.1 MB, free: 8.703 MB / 378.7 MB Notification: Performance of preOpt evalFunc (simulation): time 1.442e-05/0.5093, allocations: 0 / 487.1 MB, free: 8.703 MB / 378.7 MB Notification: Performance of preOpt encapsulateWhenConditions (simulation): time 0.001427/0.5107, allocations: 0.7134 MB / 487.8 MB, free: 7.949 MB / 378.7 MB Notification: Performance of pre-optimization done (n=33): time 4.779e-06/0.5108, allocations: 8 kB / 487.8 MB, free: 7.941 MB / 378.7 MB Notification: Performance of matching and sorting (n=33): time 0.002336/0.5131, allocations: 0.9441 MB / 488.7 MB, free: 6.992 MB / 378.7 MB Notification: Performance of inlineWhenForInitialization (initialization): time 0.0003048/0.5134, allocations: 329 kB / 489 MB, free: 6.609 MB / 378.7 MB Notification: Performance of selectInitializationVariablesDAE (initialization): time 0.003973/0.5174, allocations: 1.578 MB / 490.6 MB, free: 5.02 MB / 378.7 MB Notification: Performance of collectPreVariables (initialization): time 0.0002152/0.5177, allocations: 41.7 kB / 490.7 MB, free: 4.973 MB / 378.7 MB Notification: Performance of collectInitialEqns (initialization): time 0.0001131/0.5178, allocations: 172.8 kB / 490.8 MB, free: 4.801 MB / 378.7 MB Notification: Performance of collectInitialBindings (initialization): time 0.0001792/0.518, allocations: 71.17 kB / 490.9 MB, free: 4.73 MB / 378.7 MB Notification: Performance of simplifyInitialFunctions (initialization): time 8.588e-05/0.5181, allocations: 12 kB / 490.9 MB, free: 4.719 MB / 378.7 MB Notification: Performance of setup shared object (initialization): time 0.0001809/0.5183, allocations: 326.8 kB / 491.2 MB, free: 4.391 MB / 378.7 MB Notification: Performance of preBalanceInitialSystem (initialization): time 0.001101/0.5194, allocations: 447.8 kB / 491.7 MB, free: 3.953 MB / 378.7 MB Notification: Performance of partitionIndependentBlocks (initialization): time 0.001093/0.5205, allocations: 451.8 kB / 492.1 MB, free: 3.512 MB / 378.7 MB Notification: Performance of analyzeInitialSystem (initialization): time 0.0006959/0.5212, allocations: 296.4 kB / 492.4 MB, free: 3.223 MB / 378.7 MB Notification: Performance of solveInitialSystemEqSystem (initialization): time 3.296e-06/0.5212, allocations: 0 / 492.4 MB, free: 3.223 MB / 378.7 MB Notification: Performance of matching and sorting (n=37) (initialization): time 0.002121/0.5234, allocations: 0.8657 MB / 493.3 MB, free: 2.355 MB / 378.7 MB Notification: Performance of prepare postOptimizeDAE: time 2.029e-05/0.5234, allocations: 11.94 kB / 493.3 MB, free: 2.344 MB / 378.7 MB Notification: Performance of postOpt simplifyComplexFunction (initialization): time 9.809e-06/0.5234, allocations: 3.906 kB / 493.3 MB, free: 2.34 MB / 378.7 MB Notification: Performance of postOpt tearingSystem (initialization): time 1.835e-05/0.5235, allocations: 0 / 493.3 MB, free: 2.34 MB / 378.7 MB Notification: Performance of postOpt solveSimpleEquations (initialization): time 3.534e-05/0.5235, allocations: 7.922 kB / 493.3 MB, free: 2.332 MB / 378.7 MB Notification: Performance of postOpt calculateStrongComponentJacobians (initialization): time 8.256e-06/0.5235, allocations: 8 kB / 493.3 MB, free: 2.324 MB / 378.7 MB Notification: Performance of postOpt simplifyAllExpressions (initialization): time 0.0004971/0.5241, allocations: 35.88 kB / 493.3 MB, free: 2.289 MB / 378.7 MB Notification: Performance of postOpt collapseArrayExpressions (initialization): time 0.0002419/0.5243, allocations: 120.2 kB / 493.5 MB, free: 2.172 MB / 378.7 MB Notification: Model statistics after passing the back-end for initialization: * Number of independent subsystems: 1 * Number of states: 0 () * Number of discrete variables: 37 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,$PRE.dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].x,$PRE.dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,$PRE.dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].x,$PRE.dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2]) * Number of discrete states: 0 () * Top-level inputs: 0 Notification: Strong component statistics for initialization (16): * Single equations (assignments): 8 * Array equations: 0 * Algorithm blocks: 8 * Record equations: 0 * When equations: 0 * If-equations: 0 * Equation systems (linear and non-linear blocks): 0 * Torn equation systems: 0 * Mixed (continuous/discrete) equation systems: 0 Notification: Performance of prepare postOptimizeDAE: time 0.0006109/0.5249, allocations: 376.4 kB / 493.8 MB, free: 1.75 MB / 378.7 MB Notification: Performance of postOpt lateInlineFunction (simulation): time 0.0002961/0.5252, allocations: 134.4 kB / 494 MB, free: 1.617 MB / 378.7 MB Notification: Performance of postOpt wrapFunctionCalls (simulation): time 0.0008739/0.5261, allocations: 259.9 kB / 494.2 MB, free: 1.363 MB / 378.7 MB Notification: Performance of postOpt inlineArrayEqn (simulation): time 4.679e-06/0.5261, allocations: 3.938 kB / 494.2 MB, free: 1.359 MB / 378.7 MB Notification: Performance of postOpt constantLinearSystem (simulation): time 5.881e-06/0.5262, allocations: 0 / 494.2 MB, free: 1.359 MB / 378.7 MB Notification: Performance of postOpt simplifysemiLinear (simulation): time 7.504e-06/0.5262, allocations: 4 kB / 494.2 MB, free: 1.355 MB / 378.7 MB Notification: Performance of postOpt removeSimpleEquations (simulation): time 0.004264/0.5304, allocations: 1.873 MB / 496.1 MB, free: 15.43 MB / 394.7 MB Notification: Performance of postOpt simplifyComplexFunction (simulation): time 5.099e-06/0.5305, allocations: 0 / 496.1 MB, free: 15.43 MB / 394.7 MB Notification: Performance of postOpt solveSimpleEquations (simulation): time 1.747e-05/0.5305, allocations: 0 / 496.1 MB, free: 15.43 MB / 394.7 MB Notification: Performance of postOpt tearingSystem (simulation): time 1.098e-05/0.5305, allocations: 4 kB / 496.1 MB, free: 15.43 MB / 394.7 MB Notification: Performance of postOpt inputDerivativesUsed (simulation): time 0.0001231/0.5307, allocations: 39.97 kB / 496.1 MB, free: 15.39 MB / 394.7 MB Notification: Performance of postOpt calculateStrongComponentJacobians (simulation): time 3.667e-06/0.5307, allocations: 0 / 496.1 MB, free: 15.39 MB / 394.7 MB Notification: Performance of postOpt calculateStateSetsJacobians (simulation): time 2.976e-06/0.5307, allocations: 0 / 496.1 MB, free: 15.39 MB / 394.7 MB Notification: Performance of postOpt detectJacobianSparsePattern (simulation): time 0.002536/0.5333, allocations: 1.144 MB / 497.3 MB, free: 14.23 MB / 394.7 MB Notification: Performance of postOpt removeConstants (simulation): time 0.002101/0.5354, allocations: 0.6941 MB / 498 MB, free: 13.51 MB / 394.7 MB Notification: Performance of postOpt simplifyTimeIndepFuncCalls (simulation): time 0.0003746/0.5358, allocations: 55.97 kB / 498 MB, free: 13.46 MB / 394.7 MB Notification: Performance of postOpt simplifyAllExpressions (simulation): time 0.0006585/0.5364, allocations: 43.97 kB / 498.1 MB, free: 13.41 MB / 394.7 MB Notification: Performance of postOpt findZeroCrossings (simulation): time 0.001081/0.5375, allocations: 383.6 kB / 498.4 MB, free: 13.04 MB / 394.7 MB Notification: Performance of postOpt collapseArrayExpressions (simulation): time 0.0002578/0.5378, allocations: 127.9 kB / 498.6 MB, free: 12.91 MB / 394.7 MB Notification: Performance of sort global known variables: time 0.003261/0.5411, allocations: 1.287 MB / 499.9 MB, free: 11.62 MB / 394.7 MB Notification: Performance of remove unused functions: time 0.0007989/0.5419, allocations: 135.9 kB / 500 MB, free: 11.49 MB / 394.7 MB Notification: Model statistics after passing the back-end for simulation: * Number of independent subsystems: 1 * Number of states: 0 () * Number of discrete variables: 33 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2]) * Number of discrete states: 31 (enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.next_assign_val[2],dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,$whenCondition2,$whenCondition1,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,$whenCondition4,$whenCondition3,dLATREGSRL.delay.inertialDelaySensitive[1].x) * Top-level inputs: 0 Notification: Strong component statistics for simulation (12): * Single equations (assignments): 4 * Array equations: 0 * Algorithm blocks: 8 * Record equations: 0 * When equations: 0 * If-equations: 0 * Equation systems (linear and non-linear blocks): 0 * Torn equation systems: 0 * Mixed (continuous/discrete) equation systems: 0 Notification: Performance of Backend phase and start with SimCode phase: time 0.0004005/0.5423, allocations: 189.6 kB / 0.4884 GB, free: 11.3 MB / 394.7 MB Notification: Performance of simCode: created initialization part: time 0.002927/0.5453, allocations: 1.431 MB / 0.4898 GB, free: 9.816 MB / 394.7 MB Notification: Performance of simCode: created event and clocks part: time 3.787e-06/0.5453, allocations: 0 / 0.4898 GB, free: 9.816 MB / 394.7 MB Notification: Performance of simCode: created simulation system equations: time 0.002191/0.5475, allocations: 1.224 MB / 0.491 GB, free: 8.543 MB / 394.7 MB Notification: Performance of simCode: created of all other equations (e.g. parameter, nominal, assert, etc): time 0.002324/0.5499, allocations: 270.6 kB / 0.4913 GB, free: 8.277 MB / 394.7 MB Notification: Performance of simCode: created linear, non-linear and system jacobian parts: time 0.007181/0.5571, allocations: 2.623 MB / 0.4939 GB, free: 5.609 MB / 394.7 MB Notification: Performance of simCode: all other stuff during SimCode phase: time 0.001844/0.559, allocations: 1.238 MB / 0.4951 GB, free: 4.34 MB / 394.7 MB Notification: Performance of SimCode: time 1.193e-06/0.5591, allocations: 0 / 0.4951 GB, free: 4.34 MB / 394.7 MB Notification: Performance of Templates: time 0.1843/0.7434, allocations: 9.728 MB / 0.5046 GB, free: 101.4 MB / 394.7 MB make -j1 -f Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.makefile (rm -f Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe ; mkfifo Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe ; head -c 1048576 < Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe >> ../files/Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.sim & ./Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL --alarm=480 -emit_protected > Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.pipe 2>&1) diffSimulationResults("Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL_res.mat","/var/lib/jenkins1/ws/OpenModelicaLibraryTestingWork/Reference-modelica.org/ReferenceResults/MAP-LIB_ReferenceResults/v3.2.3+build.4/Modelica/Electrical/Digital/Examples/DLATREGSRL/DLATREGSRL.csv","../files/Modelica_3.2.3_cpp_Modelica.Electrical.Digital.Examples.DLATREGSRL.diff",relTol=0.003,relTolDiffMinMax=0.003,rangeDelta=0.001) "" Variables in the reference:time,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y Variables in the result:_D_whenCondition1,_D_whenCondition2,_D_whenCondition3,_D_whenCondition4,dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRL.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRL.dLATSR.dataIn[1],dLATREGSRL.dLATSR.dataIn[2],dLATREGSRL.dLATSR.dataOut[1],dLATREGSRL.dLATSR.dataOut[2],dLATREGSRL.dLATSR.enable,dLATREGSRL.dLATSR.enable_flag,dLATREGSRL.dLATSR.n,dLATREGSRL.dLATSR.next_assign_val[1],dLATREGSRL.dLATSR.next_assign_val[2],dLATREGSRL.dLATSR.nextstate[1],dLATREGSRL.dLATSR.nextstate[2],dLATREGSRL.dLATSR.reset,dLATREGSRL.dLATSR.reset_set_flag,dLATREGSRL.dLATSR.set,dLATREGSRL.dLATSR.strength,dLATREGSRL.dataIn[1],dLATREGSRL.dataIn[2],dLATREGSRL.dataOut[1],dLATREGSRL.dataOut[2],dLATREGSRL.delay.inertialDelaySensitive[1].delayTime,dLATREGSRL.delay.inertialDelaySensitive[1].lh,dLATREGSRL.delay.inertialDelaySensitive[1].tHL,dLATREGSRL.delay.inertialDelaySensitive[1].tLH,dLATREGSRL.delay.inertialDelaySensitive[1].t_next,dLATREGSRL.delay.inertialDelaySensitive[1].x,dLATREGSRL.delay.inertialDelaySensitive[1].y,dLATREGSRL.delay.inertialDelaySensitive[1].y0,dLATREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[1].y_old,dLATREGSRL.delay.inertialDelaySensitive[2].delayTime,dLATREGSRL.delay.inertialDelaySensitive[2].lh,dLATREGSRL.delay.inertialDelaySensitive[2].tHL,dLATREGSRL.delay.inertialDelaySensitive[2].tLH,dLATREGSRL.delay.inertialDelaySensitive[2].t_next,dLATREGSRL.delay.inertialDelaySensitive[2].x,dLATREGSRL.delay.inertialDelaySensitive[2].y,dLATREGSRL.delay.inertialDelaySensitive[2].y0,dLATREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRL.delay.inertialDelaySensitive[2].y_old,dLATREGSRL.delay.n,dLATREGSRL.delay.tHL,dLATREGSRL.delay.tLH,dLATREGSRL.delay.x[1],dLATREGSRL.delay.x[2],dLATREGSRL.delay.y[1],dLATREGSRL.delay.y[2],dLATREGSRL.enable,dLATREGSRL.n,dLATREGSRL.reset,dLATREGSRL.set,dLATREGSRL.strength,dLATREGSRL.tHL,dLATREGSRL.tLH,data_0.n,data_0.t[1],data_0.t[2],data_0.x[1],data_0.x[2],data_0.y,data_0.y0,data_1.n,data_1.t[1],data_1.t[2],data_1.x[1],data_1.x[2],data_1.y,data_1.y0,enable.n,enable.t[1],enable.t[2],enable.t[3],enable.x[1],enable.x[2],enable.x[3],enable.y,enable.y0,reset.n,reset.t[1],reset.t[2],reset.t[3],reset.t[4],reset.t[5],reset.x[1],reset.x[2],reset.x[3],reset.x[4],reset.x[5],reset.y,reset.y0,set.n,set.t[1],set.t[2],set.t[3],set.x[1],set.x[2],set.x[3],set.y,set.y0,time