Running: ./testmodel.py --libraries=/home/hudson/saved_omc/libraries/.openmodelica/libraries --ompython_omhome=/usr Modelica_3.2.2_Modelica.Electrical.Digital.Examples.DLATREG.conf.json
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo", uses=false)
Using package Modelica with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo)
Using package Complex with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo)
Using package ModelicaServices with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo)
Running command: translateModel(Modelica.Electrical.Digital.Examples.DLATREG,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.2.2_Modelica.Electrical.Digital.Examples.DLATREG")
translateModel(Modelica.Electrical.Digital.Examples.DLATREG,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.2.2_Modelica.Electrical.Digital.Examples.DLATREG")
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo): time 0.001191/0.001192, allocations: 116.6 kB / 17.75 MB, free: 5.168 MB / 14.72 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo): time 0.001128/0.001128, allocations: 192.6 kB / 18.68 MB, free: 4.254 MB / 14.72 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo): time 1.248/1.248, allocations: 205.1 MB / 224.6 MB, free: 12.21 MB / 190.1 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 1.648e-05/1.65e-05, allocations: 9.031 kB / 328.5 MB, free: 3.336 MB / 270.1 MB
Notification: Performance of NFInst.instantiate(Modelica.Electrical.Digital.Examples.DLATREG): time 0.002372/0.002397, allocations: 1.727 MB / 330.2 MB, free: 1.598 MB / 270.1 MB
Notification: Performance of NFInst.instExpressions: time 0.002007/0.004416, allocations: 1.007 MB / 331.2 MB, free: 0.582 MB / 270.1 MB
Notification: Performance of NFInst.updateImplicitVariability: time 6.764e-05/0.004495, allocations: 4 kB / 331.2 MB, free: 0.5781 MB / 270.1 MB
Notification: Performance of NFTyping.typeComponents: time 0.0001422/0.004643, allocations: 31.72 kB / 331.3 MB, free: 0.5469 MB / 270.1 MB
Notification: Performance of NFTyping.typeBindings: time 0.000121/0.004777, allocations: 35.72 kB / 331.3 MB, free: 0.5117 MB / 270.1 MB
Notification: Performance of NFTyping.typeClassSections: time 0.0002431/0.005028, allocations: 111.8 kB / 331.4 MB, free: 412 kB / 270.1 MB
Notification: Performance of NFFlatten.flatten: time 0.0005166/0.005554, allocations: 0.4915 MB / 331.9 MB, free: 15.91 MB / 286.1 MB
Notification: Performance of NFFlatten.resolveConnections: time 0.0001446/0.005708, allocations: 65.67 kB / 332 MB, free: 15.84 MB / 286.1 MB
Notification: Performance of NFEvalConstants.evaluate: time 0.0006228/0.006338, allocations: 0.7213 MB / 332.7 MB, free: 15.12 MB / 286.1 MB
Notification: Performance of NFSimplifyModel.simplify: time 0.0001699/0.006517, allocations: 131.5 kB / 332.8 MB, free: 14.99 MB / 286.1 MB
Notification: Performance of NFPackage.collectConstants: time 5.786e-05/0.006582, allocations: 28 kB / 332.9 MB, free: 14.96 MB / 286.1 MB
Notification: Performance of NFFlatten.collectFunctions: time 5.541e-05/0.006643, allocations: 28 kB / 332.9 MB, free: 14.94 MB / 286.1 MB
Notification: Performance of combineBinaries: time 0.0002557/0.006905, allocations: 340.8 kB / 333.2 MB, free: 14.6 MB / 286.1 MB
Notification: Performance of replaceArrayConstructors: time 0.0001051/0.007017, allocations: 181.4 kB / 333.4 MB, free: 14.42 MB / 286.1 MB
Notification: Performance of NFVerifyModel.verify: time 6.69e-05/0.007089, allocations: 43.94 kB / 333.4 MB, free: 14.38 MB / 286.1 MB
Notification: Performance of FrontEnd: time 1.85e-05/0.007113, allocations: 7.938 kB / 333.4 MB, free: 14.37 MB / 286.1 MB
Notification: Model statistics after passing the front-end and creating the data structures used by the back-end:
 * Number of equations: 40 (19)
 * Number of variables: 40 (25)
Notification: Performance of Bindings: time 0.001063/0.00818, allocations: 1.135 MB / 334.6 MB, free: 13.13 MB / 286.1 MB
Notification: Performance of FunctionAlias: time 0.000154/0.008346, allocations: 123.8 kB / 334.7 MB, free: 13.01 MB / 286.1 MB
Notification: Performance of Early Inline: time 0.0008674/0.00922, allocations: 0.8864 MB / 335.6 MB, free: 12.1 MB / 286.1 MB
Notification: Performance of simplify1: time 1.315e-05/0.009241, allocations: 7.984 kB / 335.6 MB, free: 12.09 MB / 286.1 MB
Notification: Performance of Alias: time 0.0007116/0.009967, allocations: 0.6073 MB / 336.2 MB, free: 11.43 MB / 286.1 MB
Notification: Performance of simplify2: time 9.468e-06/0.009986, allocations: 11.92 kB / 336.2 MB, free: 11.41 MB / 286.1 MB
Notification: Performance of Events: time 0.000878/0.01087, allocations: 0.8383 MB / 337 MB, free: 10.38 MB / 286.1 MB
Notification: Performance of Detect States: time 0.0004251/0.0113, allocations: 383.8 kB / 337.4 MB, free: 9.992 MB / 286.1 MB
Notification: Performance of Partitioning: time 0.0002739/0.01159, allocations: 251.9 kB / 337.7 MB, free: 9.738 MB / 286.1 MB
Error: Internal error NBResolveSingularities.noIndexReduction failed.
(2|2) Unmatched Variables
***************************
        [DISC] (1) protected Integer dLATREG.dLATR.enable_flag (start = 0)
         slice: {}
        [DISC] (1) protected Integer dLATREG.dLATR.reset_flag (start = 1)
         slice: {}

(1|2) Unmatched Equations
***************************
        [ALGO] (8) ($RES_SIM_0)
[----] if enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'1' or enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'H' then
[----]   dLATREG.dLATR.enable_flag := 1;
[----] elseif enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'0' or enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'L' then
[----]   dLATREG.dLATR.enable_flag := 0;
[----] elseif enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'U' then
[----]   dLATREG.dLATR.enable_flag := 3;
[----] elseif true then
[----]   dLATREG.dLATR.enable_flag := 2;
[----] end if;

[----] dLATREG.dLATR.reset_flag := dLATREG.dLATR.ResetMap[reset.y];

[----] for i in 1:2 loop
[----]   if dLATREG.dLATR.reset_flag == 1 then
[----]     dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]   elseif dLATREG.dLATR.reset_flag == 2 then
[----]     dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0';
[----]   elseif dLATREG.dLATR.reset_flag == 3 then
[----]     if dLATREG.dLATR.enable_flag == 0 then
[----]       #UNKNOWN STATEMENT#;
[----]     elseif dLATREG.dLATR.enable_flag == 3 then
[----]       dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]     elseif dLATREG.dLATR.enable_flag == 1 then
[----]       dLATREG.dLATR.nextstate[i] := ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dLATREG.dLATR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01'];
[----]     elseif true then
[----]       if dLATREG.dLATR.next_assign_val[i] == ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dLATREG.dLATR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01'] or dLATREG.dLATR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then
[----]         #UNKNOWN STATEMENT#;
[----]       elseif dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then
[----]         dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]       elseif true then
[----]         dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X';
[----]       end if;
[----]     end if;
[----]   elseif dLATREG.dLATR.reset_flag == 4 then
[----]     if (dLATREG.dLATR.enable_flag == 3 or dLATREG.dLATR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREG.dLATR.enable_flag <> 1) or dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREG.dLATR.enable_flag <> 0 then
[----]       dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]     elseif dLATREG.dLATR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' and ((dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') or dLATREG.dLATR.enable_flag == 0) then
[----]       #UNKNOWN STATEMENT#;
[----]     elseif (dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') and dLATREG.dLATR.enable_flag == 1 then
[----]       dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0';
[----]     elseif true then
[----]       dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X';
[----]     end if;
[----]   end if;
[----] end for;

[----] dLATREG.dLATR.next_assign_val := dLATREG.dLATR.nextstate;
[----] dLATREG.dLATR.dataOut := dLATREG.dLATR.nextstate;

         slice: {6, 7}