Running: ./testmodel.py --libraries=/home/hudson/saved_omc/libraries/.openmodelica/libraries --ompython_omhome=/usr Modelica_3.2.1_Modelica.Electrical.Digital.Examples.DLATREGSRL.conf.json loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo", uses=false) loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo", uses=false) loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo", uses=false) Using package Modelica with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo) Using package Complex with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo) Using package ModelicaServices with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo) Running command: translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.2.1_Modelica.Electrical.Digital.Examples.DLATREGSRL") translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRL,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.2.1_Modelica.Electrical.Digital.Examples.DLATREGSRL") Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo): time 0.001207/0.001206, allocations: 106 kB / 16.42 MB, free: 6.453 MB / 14.72 MB Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo): time 0.001035/0.001036, allocations: 190 kB / 17.36 MB, free: 5.707 MB / 14.72 MB Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo): time 1.217/1.217, allocations: 205.1 MB / 223.2 MB, free: 12.22 MB / 190.1 MB Notification: Performance of FrontEnd - Absyn->SCode: time 2.041e-05/2.042e-05, allocations: 2.281 kB / 327.2 MB, free: 3.332 MB / 270.1 MB Notification: Performance of NFInst.instantiate(Modelica.Electrical.Digital.Examples.DLATREGSRL): time 0.002521/0.00255, allocations: 1.794 MB / 329 MB, free: 1.527 MB / 270.1 MB Notification: Performance of NFInst.instExpressions: time 0.001977/0.004539, allocations: 1.07 MB / 330 MB, free: 460 kB / 270.1 MB Notification: Performance of NFInst.updateImplicitVariability: time 7.006e-05/0.00462, allocations: 0 / 330 MB, free: 460 kB / 270.1 MB Notification: Performance of NFTyping.typeComponents: time 0.0001416/0.004768, allocations: 35.7 kB / 330.1 MB, free: 424 kB / 270.1 MB Notification: Performance of NFTyping.typeBindings: time 0.0002212/0.005004, allocations: 171.5 kB / 330.2 MB, free: 252 kB / 270.1 MB Notification: Performance of NFTyping.typeClassSections: time 0.0003192/0.005333, allocations: 143.8 kB / 330.4 MB, free: 108 kB / 270.1 MB Notification: Performance of NFFlatten.flatten: time 0.0008864/0.006231, allocations: 0.6631 MB / 331.1 MB, free: 15.44 MB / 286.1 MB Notification: Performance of NFFlatten.resolveConnections: time 0.0002127/0.006459, allocations: 102.1 kB / 331.2 MB, free: 15.34 MB / 286.1 MB Notification: Performance of NFEvalConstants.evaluate: time 0.001251/0.007723, allocations: 0.9671 MB / 332.1 MB, free: 14.37 MB / 286.1 MB Notification: Performance of NFSimplifyModel.simplify: time 0.0003653/0.008102, allocations: 175.3 kB / 332.3 MB, free: 14.2 MB / 286.1 MB Notification: Performance of NFPackage.collectConstants: time 0.0001069/0.008219, allocations: 36 kB / 332.3 MB, free: 14.16 MB / 286.1 MB Notification: Performance of NFFlatten.collectFunctions: time 0.0001039/0.008333, allocations: 40 kB / 332.4 MB, free: 14.12 MB / 286.1 MB Notification: Performance of combineBinaries: time 0.0004775/0.008819, allocations: 416.2 kB / 332.8 MB, free: 13.71 MB / 286.1 MB Notification: Performance of replaceArrayConstructors: time 0.0001489/0.008977, allocations: 197.2 kB / 333 MB, free: 13.52 MB / 286.1 MB Notification: Performance of NFVerifyModel.verify: time 0.0001177/0.009103, allocations: 55.88 kB / 333 MB, free: 13.46 MB / 286.1 MB Notification: Performance of FrontEnd: time 3.889e-05/0.009151, allocations: 15.88 kB / 333 MB, free: 13.45 MB / 286.1 MB Notification: Model statistics after passing the front-end and creating the data structures used by the back-end: * Number of equations: 43 (22) * Number of variables: 43 (28) Notification: Performance of Bindings: time 0.001895/0.01105, allocations: 1.345 MB / 334.4 MB, free: 12 MB / 286.1 MB Notification: Performance of FunctionAlias: time 0.0002497/0.01131, allocations: 143.8 kB / 334.5 MB, free: 11.86 MB / 286.1 MB Notification: Performance of Early Inline: time 0.001624/0.01295, allocations: 1.113 MB / 335.6 MB, free: 10.72 MB / 286.1 MB Notification: Performance of simplify1: time 2.01e-05/0.01298, allocations: 7.984 kB / 335.6 MB, free: 10.71 MB / 286.1 MB Notification: Performance of Alias: time 0.001472/0.01446, allocations: 0.7677 MB / 336.4 MB, free: 9.883 MB / 286.1 MB Notification: Performance of simplify2: time 1.343e-05/0.01449, allocations: 11.98 kB / 336.4 MB, free: 9.871 MB / 286.1 MB Notification: Performance of Events: time 0.001122/0.01562, allocations: 0.7749 MB / 337.2 MB, free: 8.988 MB / 286.1 MB Notification: Performance of Detect States: time 0.0006519/0.01628, allocations: 455.8 kB / 337.6 MB, free: 8.527 MB / 286.1 MB Notification: Performance of Partitioning: time 0.0004217/0.01672, allocations: 284 kB / 337.9 MB, free: 8.242 MB / 286.1 MB Error: Internal error NBResolveSingularities.noIndexReduction failed. (2|2) Unmatched Variables *************************** [DISC] (1) protected Integer dLATREGSRL.dLATSR.reset_set_flag (start = 1) slice: {} [DISC] (1) protected Integer dLATREGSRL.dLATSR.enable_flag (start = 0) slice: {} (1|2) Unmatched Equations *************************** [ALGO] (8) ($RES_SIM_0) [----] if enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'1' or enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'H' then [----] dLATREGSRL.dLATSR.enable_flag := 1; [----] elseif enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'0' or enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'L' then [----] dLATREGSRL.dLATSR.enable_flag := 0; [----] elseif enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'U' then [----] dLATREGSRL.dLATSR.enable_flag := 3; [----] elseif true then [----] dLATREGSRL.dLATSR.enable_flag := 2; [----] end if; [----] dLATREGSRL.dLATSR.reset_set_flag := dLATREGSRL.dLATSR.ResetSetMap[reset.y, set.y]; [----] for i in 1:2 loop [----] if dLATREGSRL.dLATSR.reset_set_flag == 1 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif dLATREGSRL.dLATSR.reset_set_flag == 2 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'1'; [----] elseif dLATREGSRL.dLATSR.reset_set_flag == 3 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0'; [----] elseif dLATREGSRL.dLATSR.reset_set_flag == 4 then [----] if (dLATREGSRL.dLATSR.enable_flag == 3 or dLATREGSRL.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRL.dLATSR.enable_flag <> 1) or dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRL.dLATSR.enable_flag <> 0 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif true then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] end if; [----] elseif dLATREGSRL.dLATSR.reset_set_flag == 5 then [----] if (dLATREGSRL.dLATSR.enable_flag == 3 or dLATREGSRL.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRL.dLATSR.enable_flag <> 1) or dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRL.dLATSR.enable_flag <> 0 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif dLATREGSRL.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'1' and ((dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'1' or dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'H') or dLATREGSRL.dLATSR.enable_flag == 0) then [----] #UNKNOWN STATEMENT#; [----] elseif (dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'1' or dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'H') and dLATREGSRL.dLATSR.enable_flag == 1 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'1'; [----] elseif true then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] end if; [----] elseif dLATREGSRL.dLATSR.reset_set_flag == 6 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] elseif dLATREGSRL.dLATSR.reset_set_flag == 7 then [----] if (dLATREGSRL.dLATSR.enable_flag == 3 or dLATREGSRL.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRL.dLATSR.enable_flag <> 1) or dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRL.dLATSR.enable_flag <> 0 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif dLATREGSRL.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' and ((dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') or dLATREGSRL.dLATSR.enable_flag == 0) then [----] #UNKNOWN STATEMENT#; [----] elseif (dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') and dLATREGSRL.dLATSR.enable_flag == 1 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0'; [----] elseif true then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] end if; [----] elseif dLATREGSRL.dLATSR.reset_set_flag == 8 then [----] if dLATREGSRL.dLATSR.enable_flag == 0 then [----] #UNKNOWN STATEMENT#; [----] elseif dLATREGSRL.dLATSR.enable_flag == 3 then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif dLATREGSRL.dLATSR.enable_flag == 1 then [----] dLATREGSRL.dLATSR.nextstate[i] := ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dLATREGSRL.dLATSR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01']; [----] elseif true then [----] if dLATREGSRL.dLATSR.next_assign_val[i] == ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dLATREGSRL.dLATSR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01'] or dLATREGSRL.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then [----] #UNKNOWN STATEMENT#; [----] elseif dLATREGSRL.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif true then [----] dLATREGSRL.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] end if; [----] end if; [----] end if; [----] end for; [----] dLATREGSRL.dLATSR.next_assign_val := dLATREGSRL.dLATSR.nextstate; [----] dLATREGSRL.dLATSR.dataOut := dLATREGSRL.dLATSR.nextstate; slice: {6, 7}