Running: ./testmodel.py --libraries=/home/hudson/saved_omc/libraries/.openmodelica/libraries --ompython_omhome=/usr Modelica_3.1_Modelica.Electrical.Digital.Examples.DLATREGSRH.conf.json loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo", uses=false) loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo", uses=false) loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo", uses=false) Using package Modelica with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo) Using package Complex with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo) Using package ModelicaServices with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo) Running command: translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRH,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.1_Modelica.Electrical.Digital.Examples.DLATREGSRH") translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRH,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.1_Modelica.Electrical.Digital.Examples.DLATREGSRH") Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo): time 0.001366/0.00137, allocations: 106.2 kB / 16.42 MB, free: 6.477 MB / 14.72 MB Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo): time 0.001301/0.001301, allocations: 192.3 kB / 17.36 MB, free: 5.707 MB / 14.72 MB Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo): time 1.359/1.359, allocations: 205.1 MB / 223.2 MB, free: 12.23 MB / 190.1 MB Notification: Performance of FrontEnd - Absyn->SCode: time 2.133e-05/2.133e-05, allocations: 6.219 kB / 327.2 MB, free: 3.344 MB / 270.1 MB Notification: Performance of NFInst.instantiate(Modelica.Electrical.Digital.Examples.DLATREGSRH): time 0.002408/0.002439, allocations: 1.782 MB / 329 MB, free: 1.551 MB / 270.1 MB Notification: Performance of NFInst.instExpressions: time 0.002161/0.004613, allocations: 1.085 MB / 330 MB, free: 468 kB / 270.1 MB Notification: Performance of NFInst.updateImplicitVariability: time 8.197e-05/0.004706, allocations: 0 / 330 MB, free: 468 kB / 270.1 MB Notification: Performance of NFTyping.typeComponents: time 0.0001557/0.004871, allocations: 35.72 kB / 330.1 MB, free: 432 kB / 270.1 MB Notification: Performance of NFTyping.typeBindings: time 0.0002356/0.00512, allocations: 167.5 kB / 330.2 MB, free: 264 kB / 270.1 MB Notification: Performance of NFTyping.typeClassSections: time 0.0002807/0.005408, allocations: 143.8 kB / 330.4 MB, free: 120 kB / 270.1 MB Notification: Performance of NFFlatten.flatten: time 0.0007464/0.006164, allocations: 0.6554 MB / 331 MB, free: 15.46 MB / 286.1 MB Notification: Performance of NFFlatten.resolveConnections: time 0.0001856/0.00636, allocations: 94.19 kB / 331.1 MB, free: 15.37 MB / 286.1 MB Notification: Performance of NFEvalConstants.evaluate: time 0.0008555/0.007223, allocations: 0.9709 MB / 332.1 MB, free: 14.39 MB / 286.1 MB Notification: Performance of NFSimplifyModel.simplify: time 0.0002403/0.007473, allocations: 171.3 kB / 332.3 MB, free: 14.23 MB / 286.1 MB Notification: Performance of NFPackage.collectConstants: time 7.707e-05/0.007559, allocations: 40 kB / 332.3 MB, free: 14.19 MB / 286.1 MB Notification: Performance of NFFlatten.collectFunctions: time 6.732e-05/0.007632, allocations: 36 kB / 332.3 MB, free: 14.15 MB / 286.1 MB Notification: Performance of combineBinaries: time 0.000357/0.007994, allocations: 420.2 kB / 332.8 MB, free: 13.74 MB / 286.1 MB Notification: Performance of replaceArrayConstructors: time 0.0001195/0.00812, allocations: 197.2 kB / 333 MB, free: 13.54 MB / 286.1 MB Notification: Performance of NFVerifyModel.verify: time 8.796e-05/0.008215, allocations: 59.81 kB / 333 MB, free: 13.48 MB / 286.1 MB Notification: Performance of FrontEnd: time 3.282e-05/0.008254, allocations: 11.88 kB / 333 MB, free: 13.47 MB / 286.1 MB Notification: Model statistics after passing the front-end and creating the data structures used by the back-end: * Number of equations: 43 (22) * Number of variables: 43 (28) Notification: Performance of Bindings: time 0.001555/0.009814, allocations: 1.349 MB / 334.4 MB, free: 12.02 MB / 286.1 MB Notification: Performance of FunctionAlias: time 0.0002073/0.01003, allocations: 143.7 kB / 334.5 MB, free: 11.88 MB / 286.1 MB Notification: Performance of Early Inline: time 0.001214/0.01125, allocations: 1.121 MB / 335.6 MB, free: 10.73 MB / 286.1 MB Notification: Performance of simplify1: time 1.498e-05/0.01127, allocations: 11.97 kB / 335.6 MB, free: 10.72 MB / 286.1 MB Notification: Performance of Alias: time 0.0009294/0.01221, allocations: 0.76 MB / 336.4 MB, free: 9.898 MB / 286.1 MB Notification: Performance of simplify2: time 1.066e-05/0.01223, allocations: 11.98 kB / 336.4 MB, free: 9.887 MB / 286.1 MB Notification: Performance of Events: time 0.0009285/0.01316, allocations: 0.7672 MB / 337.2 MB, free: 9.012 MB / 286.1 MB Notification: Performance of Detect States: time 0.0006726/0.01384, allocations: 455.8 kB / 337.6 MB, free: 8.551 MB / 286.1 MB Notification: Performance of Partitioning: time 0.000341/0.01419, allocations: 287.9 kB / 337.9 MB, free: 8.262 MB / 286.1 MB Error: Internal error NBResolveSingularities.noIndexReduction failed. (2|2) Unmatched Variables *************************** [DISC] (1) protected Integer dLATREGSRH.dLATSR.enable_flag (start = 0) slice: {} [DISC] (1) protected Integer dLATREGSRH.dLATSR.reset_set_flag (start = 1) slice: {} (1|2) Unmatched Equations *************************** [ALGO] (8) ($RES_SIM_0) [----] if enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'1' or enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'H' then [----] dLATREGSRH.dLATSR.enable_flag := 1; [----] elseif enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'0' or enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'L' then [----] dLATREGSRH.dLATSR.enable_flag := 0; [----] elseif enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'U' then [----] dLATREGSRH.dLATSR.enable_flag := 3; [----] elseif true then [----] dLATREGSRH.dLATSR.enable_flag := 2; [----] end if; [----] dLATREGSRH.dLATSR.reset_set_flag := dLATREGSRH.dLATSR.ResetSetMap[reset.y, set.y]; [----] for i in 1:2 loop [----] if dLATREGSRH.dLATSR.reset_set_flag == 1 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif dLATREGSRH.dLATSR.reset_set_flag == 2 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'1'; [----] elseif dLATREGSRH.dLATSR.reset_set_flag == 3 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0'; [----] elseif dLATREGSRH.dLATSR.reset_set_flag == 4 then [----] if (dLATREGSRH.dLATSR.enable_flag == 3 or dLATREGSRH.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRH.dLATSR.enable_flag <> 1) or dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRH.dLATSR.enable_flag <> 0 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif true then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] end if; [----] elseif dLATREGSRH.dLATSR.reset_set_flag == 5 then [----] if (dLATREGSRH.dLATSR.enable_flag == 3 or dLATREGSRH.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRH.dLATSR.enable_flag <> 1) or dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRH.dLATSR.enable_flag <> 0 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif dLATREGSRH.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'1' and ((dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'1' or dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'H') or dLATREGSRH.dLATSR.enable_flag == 0) then [----] #UNKNOWN STATEMENT#; [----] elseif (dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'1' or dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'H') and dLATREGSRH.dLATSR.enable_flag == 1 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'1'; [----] elseif true then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] end if; [----] elseif dLATREGSRH.dLATSR.reset_set_flag == 6 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] elseif dLATREGSRH.dLATSR.reset_set_flag == 7 then [----] if (dLATREGSRH.dLATSR.enable_flag == 3 or dLATREGSRH.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRH.dLATSR.enable_flag <> 1) or dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREGSRH.dLATSR.enable_flag <> 0 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif dLATREGSRH.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' and ((dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') or dLATREGSRH.dLATSR.enable_flag == 0) then [----] #UNKNOWN STATEMENT#; [----] elseif (dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') and dLATREGSRH.dLATSR.enable_flag == 1 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0'; [----] elseif true then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] end if; [----] elseif dLATREGSRH.dLATSR.reset_set_flag == 8 then [----] if dLATREGSRH.dLATSR.enable_flag == 0 then [----] #UNKNOWN STATEMENT#; [----] elseif dLATREGSRH.dLATSR.enable_flag == 3 then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif dLATREGSRH.dLATSR.enable_flag == 1 then [----] dLATREGSRH.dLATSR.nextstate[i] := ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dLATREGSRH.dLATSR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01']; [----] elseif true then [----] if dLATREGSRH.dLATSR.next_assign_val[i] == ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dLATREGSRH.dLATSR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01'] or dLATREGSRH.dLATSR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then [----] #UNKNOWN STATEMENT#; [----] elseif dLATREGSRH.dLATSR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U'; [----] elseif true then [----] dLATREGSRH.dLATSR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X'; [----] end if; [----] end if; [----] end if; [----] end for; [----] dLATREGSRH.dLATSR.next_assign_val := dLATREGSRH.dLATSR.nextstate; [----] dLATREGSRH.dLATSR.dataOut := dLATREGSRH.dLATSR.nextstate; slice: {6, 7}