Running: ./testmodel.py --libraries=/home/hudson/saved_omc/libraries/.openmodelica/libraries --ompython_omhome=/usr Modelica_3.1_Modelica.Electrical.Digital.Examples.DLATREG.conf.json
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo", uses=false)
Using package Modelica with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo)
Using package Complex with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo)
Using package ModelicaServices with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo)
Running command: translateModel(Modelica.Electrical.Digital.Examples.DLATREG,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.1_Modelica.Electrical.Digital.Examples.DLATREG")
translateModel(Modelica.Electrical.Digital.Examples.DLATREG,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.1_Modelica.Electrical.Digital.Examples.DLATREG")
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo): time 0.001138/0.001138, allocations: 108 kB / 16.42 MB, free: 6.453 MB / 14.72 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo): time 0.001092/0.001091, allocations: 187.2 kB / 17.35 MB, free: 5.699 MB / 14.72 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo): time 1.328/1.328, allocations: 205.1 MB / 223.2 MB, free: 12.22 MB / 190.1 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 1.785e-05/1.786e-05, allocations: 2.281 kB / 327.2 MB, free: 3.332 MB / 270.1 MB
Notification: Performance of NFInst.instantiate(Modelica.Electrical.Digital.Examples.DLATREG): time 0.002464/0.002489, allocations: 1.736 MB / 328.9 MB, free: 1.586 MB / 270.1 MB
Notification: Performance of NFInst.instExpressions: time 0.002152/0.004653, allocations: 1.003 MB / 329.9 MB, free: 0.5742 MB / 270.1 MB
Notification: Performance of NFInst.updateImplicitVariability: time 7.41e-05/0.004738, allocations: 0 / 329.9 MB, free: 0.5742 MB / 270.1 MB
Notification: Performance of NFTyping.typeComponents: time 0.0001585/0.004902, allocations: 31.72 kB / 329.9 MB, free: 0.543 MB / 270.1 MB
Notification: Performance of NFTyping.typeBindings: time 0.0001361/0.005045, allocations: 35.72 kB / 330 MB, free: 0.5078 MB / 270.1 MB
Notification: Performance of NFTyping.typeClassSections: time 0.0002788/0.00534, allocations: 107.8 kB / 330.1 MB, free: 412 kB / 270.1 MB
Notification: Performance of NFFlatten.flatten: time 0.0005578/0.005906, allocations: 495.4 kB / 330.6 MB, free: 15.91 MB / 286.1 MB
Notification: Performance of NFFlatten.resolveConnections: time 0.0001779/0.006093, allocations: 81.64 kB / 330.7 MB, free: 15.83 MB / 286.1 MB
Notification: Performance of NFEvalConstants.evaluate: time 0.0006906/0.006792, allocations: 0.7212 MB / 331.4 MB, free: 15.11 MB / 286.1 MB
Notification: Performance of NFSimplifyModel.simplify: time 0.0001901/0.006991, allocations: 127.6 kB / 331.5 MB, free: 14.99 MB / 286.1 MB
Notification: Performance of NFPackage.collectConstants: time 6.747e-05/0.007066, allocations: 28 kB / 331.5 MB, free: 14.96 MB / 286.1 MB
Notification: Performance of NFFlatten.collectFunctions: time 5.617e-05/0.00713, allocations: 32 kB / 331.6 MB, free: 14.93 MB / 286.1 MB
Notification: Performance of combineBinaries: time 0.0003104/0.007445, allocations: 340.8 kB / 331.9 MB, free: 14.59 MB / 286.1 MB
Notification: Performance of replaceArrayConstructors: time 0.0001078/0.007561, allocations: 181.4 kB / 332.1 MB, free: 14.41 MB / 286.1 MB
Notification: Performance of NFVerifyModel.verify: time 7.038e-05/0.007637, allocations: 39.94 kB / 332.1 MB, free: 14.38 MB / 286.1 MB
Notification: Performance of FrontEnd: time 2.325e-05/0.007667, allocations: 11.88 kB / 332.1 MB, free: 14.36 MB / 286.1 MB
Notification: Model statistics after passing the front-end and creating the data structures used by the back-end:
 * Number of equations: 40 (19)
 * Number of variables: 40 (25)
Notification: Performance of Bindings: time 0.001118/0.008789, allocations: 1.143 MB / 333.3 MB, free: 13.12 MB / 286.1 MB
Notification: Performance of FunctionAlias: time 0.0001652/0.008961, allocations: 107.8 kB / 333.4 MB, free: 13.01 MB / 286.1 MB
Notification: Performance of Early Inline: time 0.0008913/0.00986, allocations: 0.8903 MB / 334.3 MB, free: 12.09 MB / 286.1 MB
Notification: Performance of simplify1: time 1.335e-05/0.009881, allocations: 7.984 kB / 334.3 MB, free: 12.09 MB / 286.1 MB
Notification: Performance of Alias: time 0.0007733/0.01066, allocations: 0.6152 MB / 334.9 MB, free: 11.41 MB / 286.1 MB
Notification: Performance of simplify2: time 9.598e-06/0.01068, allocations: 8 kB / 334.9 MB, free: 11.41 MB / 286.1 MB
Notification: Performance of Events: time 0.0008459/0.01153, allocations: 0.8374 MB / 335.7 MB, free: 10.38 MB / 286.1 MB
Notification: Performance of Detect States: time 0.0004435/0.01198, allocations: 387.8 kB / 336.1 MB, free: 9.984 MB / 286.1 MB
Notification: Performance of Partitioning: time 0.0002992/0.01229, allocations: 248 kB / 336.3 MB, free: 9.734 MB / 286.1 MB
Error: Internal error NBResolveSingularities.noIndexReduction failed.
(2|2) Unmatched Variables
***************************
        [DISC] (1) protected Integer dLATREG.dLATR.enable_flag (start = 0)
         slice: {}
        [DISC] (1) protected Integer dLATREG.dLATR.reset_flag (start = 1)
         slice: {}

(1|2) Unmatched Equations
***************************
        [ALGO] (8) ($RES_SIM_0)
[----] if enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'1' or enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'H' then
[----]   dLATREG.dLATR.enable_flag := 1;
[----] elseif enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'0' or enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'L' then
[----]   dLATREG.dLATR.enable_flag := 0;
[----] elseif enable.y == Modelica.Electrical.Digital.Interfaces.Logic.'U' then
[----]   dLATREG.dLATR.enable_flag := 3;
[----] elseif true then
[----]   dLATREG.dLATR.enable_flag := 2;
[----] end if;

[----] dLATREG.dLATR.reset_flag := dLATREG.dLATR.ResetMap[reset.y];

[----] for i in 1:2 loop
[----]   if dLATREG.dLATR.reset_flag == 1 then
[----]     dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]   elseif dLATREG.dLATR.reset_flag == 2 then
[----]     dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0';
[----]   elseif dLATREG.dLATR.reset_flag == 3 then
[----]     if dLATREG.dLATR.enable_flag == 0 then
[----]       #UNKNOWN STATEMENT#;
[----]     elseif dLATREG.dLATR.enable_flag == 3 then
[----]       dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]     elseif dLATREG.dLATR.enable_flag == 1 then
[----]       dLATREG.dLATR.nextstate[i] := ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dLATREG.dLATR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01'];
[----]     elseif true then
[----]       if dLATREG.dLATR.next_assign_val[i] == ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dLATREG.dLATR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01'] or dLATREG.dLATR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then
[----]         #UNKNOWN STATEMENT#;
[----]       elseif dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then
[----]         dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]       elseif true then
[----]         dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X';
[----]       end if;
[----]     end if;
[----]   elseif dLATREG.dLATR.reset_flag == 4 then
[----]     if (dLATREG.dLATR.enable_flag == 3 or dLATREG.dLATR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREG.dLATR.enable_flag <> 1) or dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and dLATREG.dLATR.enable_flag <> 0 then
[----]       dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]     elseif dLATREG.dLATR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' and ((dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') or dLATREG.dLATR.enable_flag == 0) then
[----]       #UNKNOWN STATEMENT#;
[----]     elseif (dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dLATREG.dLATR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') and dLATREG.dLATR.enable_flag == 1 then
[----]       dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0';
[----]     elseif true then
[----]       dLATREG.dLATR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X';
[----]     end if;
[----]   end if;
[----] end for;

[----] dLATREG.dLATR.next_assign_val := dLATREG.dLATR.nextstate;
[----] dLATREG.dLATR.dataOut := dLATREG.dLATR.nextstate;

         slice: {6, 7}