Running: ./testmodel.py --libraries=/home/hudson/saved_omc/libraries/.openmodelica/libraries --ompython_omhome=/usr Modelica_3.1_Modelica.Electrical.Digital.Examples.DFFREG.conf.json
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo", uses=false)
loadFile("/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo", uses=false)
Using package Modelica with version 3.2.3 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo)
Using package Complex with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo)
Using package ModelicaServices with version 4.0.0 (/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo)
Running command: translateModel(Modelica.Electrical.Digital.Examples.DFFREG,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.1_Modelica.Electrical.Digital.Examples.DFFREG")
translateModel(Modelica.Electrical.Digital.Examples.DFFREG,tolerance=1e-06,outputFormat="empty",numberOfIntervals=5000,variableFilter="",fileNamePrefix="Modelica_3.1_Modelica.Electrical.Digital.Examples.DFFREG")
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/ModelicaServices 4.0.0+maint.om/package.mo): time 0.001112/0.001112, allocations: 109 kB / 16.42 MB, free: 6.5 MB / 14.72 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Complex 4.0.0+maint.om/package.mo): time 0.001149/0.001149, allocations: 188.9 kB / 17.35 MB, free: 5.754 MB / 14.72 MB
Notification: Performance of loadFile(/home/hudson/saved_omc/libraries/.openmodelica/libraries/Modelica 3.2.3+maint.om/package.mo): time 1.374/1.374, allocations: 205.1 MB / 223.2 MB, free: 12.23 MB / 190.1 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 1.891e-05/1.892e-05, allocations: 2.281 kB / 327.2 MB, free: 3.355 MB / 270.1 MB
Notification: Performance of NFInst.instantiate(Modelica.Electrical.Digital.Examples.DFFREG): time 0.002476/0.002503, allocations: 1.755 MB / 328.9 MB, free: 1.59 MB / 270.1 MB
Notification: Performance of NFInst.instExpressions: time 0.001957/0.004472, allocations: 1.003 MB / 329.9 MB, free: 0.5781 MB / 270.1 MB
Notification: Performance of NFInst.updateImplicitVariability: time 8.934e-05/0.004572, allocations: 7.938 kB / 329.9 MB, free: 0.5703 MB / 270.1 MB
Notification: Performance of NFTyping.typeComponents: time 0.0001653/0.004743, allocations: 27.78 kB / 330 MB, free: 0.543 MB / 270.1 MB
Notification: Performance of NFTyping.typeBindings: time 0.0001423/0.004892, allocations: 39.7 kB / 330 MB, free: 0.5039 MB / 270.1 MB
Notification: Performance of NFTyping.typeClassSections: time 0.0003037/0.005215, allocations: 107.8 kB / 330.1 MB, free: 408 kB / 270.1 MB
Notification: Performance of NFFlatten.flatten: time 0.0005181/0.005741, allocations: 0.4953 MB / 330.6 MB, free: 15.9 MB / 286.1 MB
Notification: Performance of NFFlatten.resolveConnections: time 0.0001597/0.00591, allocations: 69.66 kB / 330.7 MB, free: 15.83 MB / 286.1 MB
Notification: Performance of NFEvalConstants.evaluate: time 0.0008115/0.006728, allocations: 0.967 MB / 331.6 MB, free: 14.86 MB / 286.1 MB
Notification: Performance of NFSimplifyModel.simplify: time 0.0001836/0.006921, allocations: 135.6 kB / 331.8 MB, free: 14.73 MB / 286.1 MB
Notification: Performance of NFPackage.collectConstants: time 6.331e-05/0.006991, allocations: 28 kB / 331.8 MB, free: 14.7 MB / 286.1 MB
Notification: Performance of NFFlatten.collectFunctions: time 5.679e-05/0.007054, allocations: 31.94 kB / 331.8 MB, free: 14.67 MB / 286.1 MB
Notification: Performance of combineBinaries: time 0.000275/0.007334, allocations: 340.8 kB / 332.2 MB, free: 14.34 MB / 286.1 MB
Notification: Performance of replaceArrayConstructors: time 0.0001078/0.007448, allocations: 185.4 kB / 332.3 MB, free: 14.15 MB / 286.1 MB
Notification: Performance of NFVerifyModel.verify: time 7.7e-05/0.007532, allocations: 43.94 kB / 332.4 MB, free: 14.11 MB / 286.1 MB
Notification: Performance of FrontEnd: time 2.349e-05/0.00756, allocations: 7.938 kB / 332.4 MB, free: 14.1 MB / 286.1 MB
Notification: Model statistics after passing the front-end and creating the data structures used by the back-end:
 * Number of equations: 40 (19)
 * Number of variables: 40 (25)
Notification: Performance of Bindings: time 0.001075/0.00864, allocations: 1.128 MB / 333.5 MB, free: 12.87 MB / 286.1 MB
Notification: Performance of FunctionAlias: time 0.0001609/0.008807, allocations: 127.8 kB / 333.6 MB, free: 12.75 MB / 286.1 MB
Notification: Performance of Early Inline: time 0.000875/0.009689, allocations: 0.8785 MB / 334.5 MB, free: 11.84 MB / 286.1 MB
Notification: Performance of simplify1: time 1.333e-05/0.00971, allocations: 7.984 kB / 334.5 MB, free: 11.83 MB / 286.1 MB
Notification: Performance of Alias: time 0.0007544/0.01047, allocations: 0.6113 MB / 335.1 MB, free: 11.16 MB / 286.1 MB
Notification: Performance of simplify2: time 8.937e-06/0.01049, allocations: 7.984 kB / 335.2 MB, free: 11.16 MB / 286.1 MB
Notification: Performance of Events: time 0.0008662/0.01136, allocations: 0.8959 MB / 336.1 MB, free: 10.04 MB / 286.1 MB
Notification: Performance of Detect States: time 0.0004583/0.01183, allocations: 413.8 kB / 336.5 MB, free: 9.625 MB / 286.1 MB
Notification: Performance of Partitioning: time 0.0002944/0.01213, allocations: 260 kB / 336.7 MB, free: 9.363 MB / 286.1 MB
Error: Internal error NBResolveSingularities.noIndexReduction failed.
(2|2) Unmatched Variables
***************************
        [DISC] (1) protected Integer dFFREG.dFFR.clock_flag (start = 0)
         slice: {}
        [DISC] (1) protected Integer dFFREG.dFFR.reset_flag (start = 1)
         slice: {}

(1|2) Unmatched Equations
***************************
        [ALGO] (8) ($RES_SIM_0)
[----] if change(dFFREG.dFFR.clock) or change(dFFREG.dFFR.reset) then
[----]   if change(dFFREG.dFFR.clock) then
[----]     if initial() then
[----]       dFFREG.dFFR.clock_flag := ({0, 0, 0, 2, 0, 0, 0, 2, 0})[dFFREG.dFFR.clock];
[----]     elseif true then
[----]       dFFREG.dFFR.clock_flag := ({{0, 0, 0, 2, 0, 0, 0, 2, 0}, {0, 0, 0, 2, 0, 0, 0, 2, 0}, {2, 2, 0, 1, 2, 2, 0, 1, 2}, {0, 0, 0, 0, 0, 0, 0, 0, 0}, {0, 0, 0, 2, 0, 0, 0, 2, 0}, {0, 0, 0, 2, 0, 0, 0, 2, 0}, {2, 2, 0, 1, 2, 2, 0, 1, 0}, {0, 0, 0, 0, 0, 0, 0, 0, 0}, {0, 0, 0, 2, 0, 0, 0, 2, 0}})[$PRE.dFFREG.dFFR.clock, dFFREG.dFFR.clock];
[----]     end if;
[----]   end if;

[----]   dFFREG.dFFR.reset_flag := dFFREG.dFFR.ResetMap[dFFREG.dFFR.reset];

[----]   for i in 1:2 loop
[----]     if dFFREG.dFFR.reset_flag == 1 then
[----]       dFFREG.dFFR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]     elseif dFFREG.dFFR.reset_flag == 2 then
[----]       dFFREG.dFFR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0';
[----]     elseif dFFREG.dFFR.reset_flag == 3 then
[----]       if dFFREG.dFFR.clock_flag == 0 then
[----]         #UNKNOWN STATEMENT#;
[----]       elseif dFFREG.dFFR.clock_flag == 1 then
[----]         dFFREG.dFFR.nextstate[i] := ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dFFREG.dFFR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01'];
[----]       elseif true then
[----]         if dFFREG.dFFR.next_assign_val[i] == ({{Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U', Modelica.Electrical.Digital.Interfaces.Logic.'U'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}, {Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'L', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'0', Modelica.Electrical.Digital.Interfaces.Logic.'L'}, {Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'1', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'Z', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'H', Modelica.Electrical.Digital.Interfaces.Logic.'1'}, {Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'X', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W', Modelica.Electrical.Digital.Interfaces.Logic.'W'}})[dFFREG.dFFR.dataIn[i], Modelica.Electrical.Digital.Interfaces.Strength.'S_X01'] or dFFREG.dFFR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then
[----]           #UNKNOWN STATEMENT#;
[----]         elseif dFFREG.dFFR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' then
[----]           dFFREG.dFFR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]         elseif true then
[----]           dFFREG.dFFR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X';
[----]         end if;
[----]       end if;
[----]     elseif dFFREG.dFFR.reset_flag == 4 then
[----]       if dFFREG.dFFR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' and ((dFFREG.dFFR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dFFREG.dFFR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') or dFFREG.dFFR.clock_flag == 0) then
[----]         #UNKNOWN STATEMENT#;
[----]       elseif (dFFREG.dFFR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'0' or dFFREG.dFFR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'L') and dFFREG.dFFR.clock_flag == 1 then
[----]         dFFREG.dFFR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'0';
[----]       elseif dFFREG.dFFR.next_assign_val[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and not dFFREG.dFFR.clock_flag == 1 or dFFREG.dFFR.dataIn[i] == Modelica.Electrical.Digital.Interfaces.Logic.'U' and not dFFREG.dFFR.clock_flag == 0 then
[----]         dFFREG.dFFR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'U';
[----]       elseif true then
[----]         dFFREG.dFFR.nextstate[i] := Modelica.Electrical.Digital.Interfaces.Logic.'X';
[----]       end if;
[----]     end if;
[----]   end for;
[----] end if;

[----] dFFREG.dFFR.next_assign_val := dFFREG.dFFR.nextstate;
[----] dFFREG.dFFR.dataOut := dFFREG.dFFR.nextstate;

         slice: {6, 7}