Running: ./testmodel.py --libraries=/var/lib/jenkins/ws/OpenModelicaLibraryTestingWork/OpenModelica/./OMCompiler/build/lib/omlibrary/ --ompython_omhome=/usr Modelica_3.2.2_Modelica.Electrical.Digital.Examples.DLATREGSRH.conf.json Using package ModelicaServices with version 3.2.2 (/var/lib/jenkins/ws/OpenModelicaLibraryTestingWork/OpenModelica/OMCompiler/build/lib/omlibrary/ModelicaServices 3.2.2/package.mo) Using package Complex with version 3.2.2 (/var/lib/jenkins/ws/OpenModelicaLibraryTestingWork/OpenModelica/OMCompiler/build/lib/omlibrary/Complex 3.2.2.mo) Using package Modelica with version 3.2.2 (/var/lib/jenkins/ws/OpenModelicaLibraryTestingWork/OpenModelica/OMCompiler/build/lib/omlibrary/Modelica 3.2.2/package.mo) Running command: translateModel(Modelica.Electrical.Digital.Examples.DLATREGSRH,tolerance=1e-06,outputFormat="mat",numberOfIntervals=5000,variableFilter="time|dLATREGSRH.delay.inertialDelaySensitive.1..x|dLATREGSRH.delay.inertialDelaySensitive.1..y|dLATREGSRH.delay.inertialDelaySensitive.2..x|dLATREGSRH.delay.inertialDelaySensitive.2..y",fileNamePrefix="Modelica_3.2.2_Modelica.Electrical.Digital.Examples.DLATREGSRH") Notification: Performance of loadModel(Modelica): time 2.066/2.066, allocations: 194.9 MB / 211.7 MB, free: 3 MB / 170.7 MB Notification: Performance of FrontEnd - loaded program: time 0.0003829/0.000383, allocations: 12 kB / 264.6 MB, free: 12.94 MB / 218.7 MB Notification: Performance of FrontEnd - Absyn->SCode: time 0.09274/0.09315, allocations: 44.5 MB / 309.1 MB, free: 384 kB / 250.7 MB Notification: Performance of NFInst.instantiate(Modelica.Electrical.Digital.Examples.DLATREGSRH): time 0.002509/0.09571, allocations: 1.438 MB / 310.5 MB, free: 14.93 MB / 266.7 MB Notification: Performance of NFInst.instExpressions: time 0.003359/0.09913, allocations: 1.027 MB / 311.5 MB, free: 13.89 MB / 266.7 MB Notification: Performance of NFInst.updateImplicitVariability: time 0.0001427/0.09933, allocations: 0 / 311.5 MB, free: 13.89 MB / 266.7 MB Notification: Performance of NFTyping.typeComponents: time 0.0001727/0.09952, allocations: 23.84 kB / 311.5 MB, free: 13.87 MB / 266.7 MB Notification: Performance of NFTyping.typeBindings: time 0.0003711/0.09991, allocations: 171.6 kB / 311.7 MB, free: 13.7 MB / 266.7 MB Notification: Performance of NFTyping.typeClassSections: time 0.0004506/0.1004, allocations: 95.81 kB / 311.8 MB, free: 13.61 MB / 266.7 MB Notification: Performance of NFFlatten.flatten: time 0.0005106/0.1009, allocations: 299.5 kB / 312.1 MB, free: 13.31 MB / 266.7 MB Notification: Performance of NFFlatten.resolveConnections: time 0.0002548/0.1012, allocations: 88.86 kB / 312.2 MB, free: 13.22 MB / 266.7 MB Notification: Performance of NFEvalConstants.evaluate: time 0.00116/0.1023, allocations: 0.6433 MB / 312.8 MB, free: 12.58 MB / 266.7 MB Notification: Performance of NFSimplifyModel.simplify: time 0.0003512/0.1027, allocations: 207.5 kB / 313 MB, free: 12.38 MB / 266.7 MB Notification: Performance of NFPackage.collectConstants: time 0.0001401/0.1029, allocations: 12 kB / 313 MB, free: 12.36 MB / 266.7 MB Notification: Performance of NFFlatten.collectFunctions: time 0.0001362/0.103, allocations: 12 kB / 313.1 MB, free: 12.35 MB / 266.7 MB Notification: Performance of NFScalarize.scalarize: time 0.0003099/0.1033, allocations: 247.2 kB / 313.3 MB, free: 12.11 MB / 266.7 MB Notification: Performance of NFVerifyModel.verify: time 0.0002643/0.1036, allocations: 205.1 kB / 313.5 MB, free: 11.9 MB / 266.7 MB Notification: Performance of NFConvertDAE.convert: time 0.001595/0.1052, allocations: 1.189 MB / 314.7 MB, free: 10.71 MB / 266.7 MB Notification: Performance of FrontEnd - DAE generated: time 3.857e-06/0.1053, allocations: 0 / 314.7 MB, free: 10.71 MB / 266.7 MB Notification: Performance of FrontEnd: time 2.615e-06/0.1053, allocations: 4 kB / 314.7 MB, free: 10.71 MB / 266.7 MB Notification: Performance of Transformations before backend: time 2.063e-05/0.1053, allocations: 0 / 314.7 MB, free: 10.71 MB / 266.7 MB Notification: Model statistics after passing the front-end and creating the data structures used by the back-end: * Number of equations: 43 * Number of variables: 43 Notification: Performance of Generate backend data structure: time 0.002526/0.1078, allocations: 1.493 MB / 316.2 MB, free: 9.109 MB / 266.7 MB Notification: Performance of prepare preOptimizeDAE: time 5.432e-05/0.1079, allocations: 8.031 kB / 316.2 MB, free: 9.102 MB / 266.7 MB Notification: Performance of preOpt normalInlineFunction (simulation): time 0.0003827/0.1083, allocations: 134.4 kB / 316.3 MB, free: 8.969 MB / 266.7 MB Notification: Performance of preOpt evaluateParameters (simulation): time 0.00101/0.1093, allocations: 0.5208 MB / 316.8 MB, free: 8.398 MB / 266.7 MB Notification: Performance of preOpt simplifyIfEquations (simulation): time 7.049e-05/0.1094, allocations: 20 kB / 316.9 MB, free: 8.379 MB / 266.7 MB Notification: Performance of preOpt expandDerOperator (simulation): time 0.0001347/0.1096, allocations: 31.98 kB / 316.9 MB, free: 8.348 MB / 266.7 MB Notification: Performance of preOpt clockPartitioning (simulation): time 0.001691/0.1113, allocations: 0.6221 MB / 317.5 MB, free: 7.719 MB / 266.7 MB Notification: Performance of preOpt findStateOrder (simulation): time 1.301e-05/0.1113, allocations: 4 kB / 317.5 MB, free: 7.715 MB / 266.7 MB Notification: Performance of preOpt replaceEdgeChange (simulation): time 9.979e-05/0.1114, allocations: 19.98 kB / 317.5 MB, free: 7.695 MB / 266.7 MB Notification: Performance of preOpt inlineArrayEqn (simulation): time 8.726e-06/0.1114, allocations: 4 kB / 317.5 MB, free: 7.691 MB / 266.7 MB Notification: Performance of preOpt removeEqualRHS (simulation): time 0.001224/0.1127, allocations: 475.7 kB / 318 MB, free: 7.227 MB / 266.7 MB Notification: Performance of preOpt removeSimpleEquations (simulation): time 0.002846/0.1155, allocations: 1.178 MB / 319.2 MB, free: 5.992 MB / 266.7 MB Notification: Performance of preOpt comSubExp (simulation): time 0.001786/0.1174, allocations: 0.6976 MB / 319.9 MB, free: 5.285 MB / 266.7 MB Notification: Performance of preOpt evalFunc (simulation): time 1.73e-05/0.1174, allocations: 0 / 319.9 MB, free: 5.285 MB / 266.7 MB Notification: Performance of preOpt encapsulateWhenConditions (simulation): time 0.001664/0.1191, allocations: 0.7562 MB / 320.6 MB, free: 4.492 MB / 266.7 MB Notification: Performance of pre-optimization done (n=33): time 3.797e-06/0.1192, allocations: 4 kB / 320.6 MB, free: 4.488 MB / 266.7 MB Notification: Performance of matching and sorting (n=33): time 0.004836/0.124, allocations: 2.155 MB / 322.8 MB, free: 2.223 MB / 266.7 MB Notification: Performance of inlineWhenForInitialization (initialization): time 0.0003134/0.1244, allocations: 329 kB / 323.1 MB, free: 1.84 MB / 266.7 MB Notification: Performance of selectInitializationVariablesDAE (initialization): time 0.004183/0.1286, allocations: 1.854 MB / 325 MB, free: 15.96 MB / 282.7 MB Notification: Performance of collectPreVariables (initialization): time 0.000216/0.1288, allocations: 41.7 kB / 325 MB, free: 15.92 MB / 282.7 MB Notification: Performance of collectInitialEqns (initialization): time 0.0004317/0.1293, allocations: 250.4 kB / 325.3 MB, free: 15.67 MB / 282.7 MB Notification: Performance of collectInitialBindings (initialization): time 0.0001884/0.1295, allocations: 79.05 kB / 325.3 MB, free: 15.59 MB / 282.7 MB Notification: Performance of simplifyInitialFunctions (initialization): time 7.971e-05/0.1296, allocations: 12 kB / 325.3 MB, free: 15.58 MB / 282.7 MB Notification: Performance of setup shared object (initialization): time 0.000248/0.1298, allocations: 378.7 kB / 325.7 MB, free: 15.2 MB / 282.7 MB Notification: Performance of preBalanceInitialSystem (initialization): time 0.001188/0.131, allocations: 455.7 kB / 326.2 MB, free: 14.75 MB / 282.7 MB Notification: Performance of partitionIndependentBlocks (initialization): time 0.001186/0.1323, allocations: 0.4903 MB / 326.6 MB, free: 14.26 MB / 282.7 MB Notification: Performance of analyzeInitialSystem (initialization): time 0.00108/0.1334, allocations: 0.5871 MB / 327.2 MB, free: 13.62 MB / 282.7 MB Notification: Performance of solveInitialSystemEqSystem (initialization): time 4.679e-06/0.1334, allocations: 0 / 327.2 MB, free: 13.62 MB / 282.7 MB Notification: Performance of matching and sorting (n=37) (initialization): time 0.003189/0.1366, allocations: 1.377 MB / 328.6 MB, free: 12.19 MB / 282.7 MB Notification: Performance of prepare postOptimizeDAE: time 0.000346/0.137, allocations: 293.6 kB / 328.9 MB, free: 11.85 MB / 282.7 MB Notification: Performance of postOpt simplifyComplexFunction (initialization): time 1.108e-05/0.137, allocations: 4 kB / 328.9 MB, free: 11.85 MB / 282.7 MB Notification: Performance of postOpt tearingSystem (initialization): time 1.879e-05/0.137, allocations: 0 / 328.9 MB, free: 11.85 MB / 282.7 MB Notification: Performance of postOpt solveSimpleEquations (initialization): time 3.777e-05/0.1371, allocations: 7.922 kB / 328.9 MB, free: 11.84 MB / 282.7 MB Notification: Performance of postOpt calculateStrongComponentJacobians (initialization): time 8.627e-06/0.1371, allocations: 4 kB / 328.9 MB, free: 11.84 MB / 282.7 MB Notification: Performance of postOpt simplifyAllExpressions (initialization): time 0.0006867/0.1378, allocations: 47.81 kB / 329 MB, free: 11.79 MB / 282.7 MB Notification: Performance of postOpt collapseArrayExpressions (initialization): time 0.0002395/0.138, allocations: 132.2 kB / 329.1 MB, free: 11.66 MB / 282.7 MB Notification: Model statistics after passing the back-end for initialization: * Number of independent subsystems: 3 * Number of states: 0 () * Number of discrete variables: 37 ($PRE.dLATREGSRH.delay.inertialDelaySensitive[2].y,$PRE.dLATREGSRH.delay.inertialDelaySensitive[1].y,$whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,$PRE.dLATREGSRH.delay.inertialDelaySensitive[1].x,dLATREGSRH.delay.inertialDelaySensitive[1].x,dLATREGSRH.delay.inertialDelaySensitive[1].y,dLATREGSRH.delay.inertialDelaySensitive[1].delayTime,dLATREGSRH.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[1].y_old,dLATREGSRH.delay.inertialDelaySensitive[1].lh,dLATREGSRH.delay.inertialDelaySensitive[1].t_next,$PRE.dLATREGSRH.delay.inertialDelaySensitive[2].x,dLATREGSRH.delay.inertialDelaySensitive[2].x,dLATREGSRH.delay.inertialDelaySensitive[2].y,dLATREGSRH.delay.inertialDelaySensitive[2].delayTime,dLATREGSRH.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[2].y_old,dLATREGSRH.delay.inertialDelaySensitive[2].lh,dLATREGSRH.delay.inertialDelaySensitive[2].t_next,dLATREGSRH.dLATSR.dataIn[1],dLATREGSRH.dLATSR.dataIn[2],dLATREGSRH.dLATSR.dataOut[1],dLATREGSRH.dLATSR.dataOut[2],dLATREGSRH.dLATSR.enable_flag,dLATREGSRH.dLATSR.reset_set_flag,dLATREGSRH.dLATSR.nextstate[1],dLATREGSRH.dLATSR.nextstate[2],dLATREGSRH.dLATSR.next_assign_val[1],dLATREGSRH.dLATSR.next_assign_val[2]) * Number of discrete states: 0 () * Number of clocked states: 0 () * Top-level inputs: 0 Notification: Strong component statistics for initialization (16): * Single equations (assignments): 8 * Array equations: 0 * Algorithm blocks: 8 * Record equations: 0 * When equations: 0 * If-equations: 0 * Equation systems (linear and non-linear blocks): 0 * Torn equation systems: 0 * Mixed (continuous/discrete) equation systems: 0 Notification: Performance of prepare postOptimizeDAE: time 0.001893/0.1399, allocations: 0.9998 MB / 330.1 MB, free: 10.6 MB / 282.7 MB Notification: Performance of postOpt lateInlineFunction (simulation): time 0.0003357/0.1403, allocations: 134.4 kB / 330.2 MB, free: 10.47 MB / 282.7 MB Notification: Performance of postOpt wrapFunctionCalls (simulation): time 0.0006273/0.1409, allocations: 247.9 kB / 330.5 MB, free: 10.23 MB / 282.7 MB Notification: Performance of postOpt simplifysemiLinear (simulation): time 7.144e-06/0.141, allocations: 3.984 kB / 330.5 MB, free: 10.22 MB / 282.7 MB Notification: Performance of postOpt simplifyComplexFunction (simulation): time 3.647e-06/0.141, allocations: 0 / 330.5 MB, free: 10.22 MB / 282.7 MB Notification: Performance of postOpt removeConstants (simulation): time 0.001722/0.1427, allocations: 0.6746 MB / 331.1 MB, free: 9.527 MB / 282.7 MB Notification: Performance of postOpt simplifyTimeIndepFuncCalls (simulation): time 0.0003313/0.1431, allocations: 55.97 kB / 331.2 MB, free: 9.473 MB / 282.7 MB Notification: Performance of postOpt simplifyAllExpressions (simulation): time 0.0005783/0.1436, allocations: 47.89 kB / 331.2 MB, free: 9.426 MB / 282.7 MB Notification: Performance of postOpt findZeroCrossings (simulation): time 0.001008/0.1447, allocations: 375.6 kB / 331.6 MB, free: 9.059 MB / 282.7 MB Notification: Performance of postOpt createDAEmodeBDAE (simulation): time 0.003747/0.1484, allocations: 2.02 MB / 333.6 MB, free: 6.883 MB / 282.7 MB Notification: Performance of postOpt detectDAEmodeSparsePattern (simulation): time 0.003691/0.1522, allocations: 1.747 MB / 335.4 MB, free: 5.066 MB / 282.7 MB Notification: Performance of postOpt setEvaluationStage (simulation): time 0.001732/0.1539, allocations: 0.9374 MB / 336.3 MB, free: 4.129 MB / 282.7 MB Notification: Performance of sorting global known variables: time 0.003185/0.1572, allocations: 1.349 MB / 337.7 MB, free: 2.777 MB / 282.7 MB Notification: Performance of Backend: time 1.072e-06/0.1572, allocations: 0 / 337.7 MB, free: 2.777 MB / 282.7 MB Notification: Performance of simCode: created initialization part: time 0.002927/0.1601, allocations: 1.534 MB / 339.2 MB, free: 1.137 MB / 282.7 MB Notification: Performance of SimCode: time 0.007111/0.1673, allocations: 3.594 MB / 342.8 MB, free: 13.39 MB / 298.7 MB Notification: Performance of Templates: time 0.03692/0.2043, allocations: 13.59 MB / 356.4 MB, free: 15.47 MB / 314.7 MB "" Variables in the reference:time,dLATREGSRH.delay.inertialDelaySensitive[1].x,dLATREGSRH.delay.inertialDelaySensitive[1].y,dLATREGSRH.delay.inertialDelaySensitive[2].x,dLATREGSRH.delay.inertialDelaySensitive[2].y Variables in the result:dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.n,dLATREGSRH.dLATSR.strength,dLATREGSRH.delay.inertialDelaySensitive[1].tHL,dLATREGSRH.delay.inertialDelaySensitive[1].tLH,dLATREGSRH.delay.inertialDelaySensitive[1].x,dLATREGSRH.delay.inertialDelaySensitive[1].y,dLATREGSRH.delay.inertialDelaySensitive[1].y0,dLATREGSRH.delay.inertialDelaySensitive[2].tHL,dLATREGSRH.delay.inertialDelaySensitive[2].tLH,dLATREGSRH.delay.inertialDelaySensitive[2].x,dLATREGSRH.delay.inertialDelaySensitive[2].y,dLATREGSRH.delay.inertialDelaySensitive[2].y0,dLATREGSRH.delay.n,dLATREGSRH.delay.tHL,dLATREGSRH.delay.tLH,dLATREGSRH.n,dLATREGSRH.strength,dLATREGSRH.tHL,dLATREGSRH.tLH,data_0.n,data_0.t[1],data_0.t[2],data_0.x[1],data_0.x[2],data_0.y0,data_1.n,data_1.t[1],data_1.t[2],data_1.x[1],data_1.x[2],data_1.y0,enable.n,enable.t[1],enable.t[2],enable.t[3],enable.x[1],enable.x[2],enable.x[3],enable.y0,reset.n,reset.t[1],reset.t[2],reset.t[3],reset.t[4],reset.t[5],reset.x[1],reset.x[2],reset.x[3],reset.x[4],reset.x[5],reset.y0,set.n,set.t[1],set.t[2],set.t[3],set.x[1],set.x[2],set.x[3],set.y0,time