Running command: "" <> buildModelFMU(Modelica.Electrical.Digital.Examples.DLATREGSRH,fileNamePrefix="Modelica_3_2_2_cs_Modelica_Electrical_Digital_Examples_DLATREGSRH",fmuType="cs",version="2.0",platforms={"dynamic"})
Notification: Performance of loadModel(Modelica): time 2.566/2.566, allocations: 195 MB / 202.9 MB, free: 6.723 MB / 170.7 MB
Notification: Performance of FrontEnd - loaded program: time 3.359e-05/3.372e-05, allocations: 4.875 kB / 249.8 MB, free: 5.223 MB / 202.7 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 0.1237/0.1238, allocations: 44.51 MB / 294.3 MB, free: 10.66 MB / 250.7 MB
Notification: Performance of FrontEnd - scodeFlatten: time 0.5436/0.6674, allocations: 77.35 MB / 371.6 MB, free: 7.055 MB / 298.7 MB
Notification: Performance of FrontEnd - mkProgramGraph: time 0.0002563/0.6677, allocations: 69.14 kB / 371.7 MB, free: 7.055 MB / 298.7 MB
Notification: Performance of FrontEnd - DAE generated: time 0.1185/0.7863, allocations: 30.56 MB / 402.2 MB, free: 13.46 MB / 314.7 MB
Notification: Performance of FrontEnd: time 2.033e-06/0.7863, allocations: 0 / 402.2 MB, free: 13.46 MB / 314.7 MB
Notification: Performance of Transformations before backend: time 4.586e-05/0.7864, allocations: 15.5 kB / 402.3 MB, free: 13.46 MB / 314.7 MB
Notification: Model statistics after passing the front-end and creating the data structures used by the back-end:
 * Number of equations: 43
 * Number of variables: 43
Notification: Performance of Generate backend data structure: time 0.002098/0.7885, allocations: 1.322 MB / 403.6 MB, free: 12.37 MB / 314.7 MB
Notification: Performance of prepare preOptimizeDAE: time 4.97e-05/0.7886, allocations: 7.719 kB / 403.6 MB, free: 12.37 MB / 314.7 MB
Notification: Performance of preOpt introduceOutputAliases (simulation): time 0.0001707/0.7888, allocations: 69.86 kB / 403.7 MB, free: 12.31 MB / 314.7 MB
Notification: Performance of preOpt normalInlineFunction (simulation): time 0.0002948/0.7891, allocations: 128.3 kB / 403.8 MB, free: 12.25 MB / 314.7 MB
Notification: Performance of preOpt evaluateParameters (simulation): time 0.001198/0.7903, allocations: 0.516 MB / 404.3 MB, free: 11.9 MB / 314.7 MB
Notification: Performance of preOpt simplifyIfEquations (simulation): time 6.283e-05/0.7904, allocations: 15.62 kB / 404.3 MB, free: 11.9 MB / 314.7 MB
Notification: Performance of preOpt expandDerOperator (simulation): time 0.0001417/0.7905, allocations: 27 kB / 404.3 MB, free: 11.9 MB / 314.7 MB
Notification: Performance of preOpt removeEqualFunctionCalls (simulation): time 0.001098/0.7916, allocations: 454.9 kB / 404.8 MB, free: 11.84 MB / 314.7 MB
Notification: Performance of preOpt clockPartitioning (simulation): time 0.001455/0.7931, allocations: 0.5858 MB / 405.4 MB, free: 11.68 MB / 314.7 MB
Notification: Performance of preOpt findStateOrder (simulation): time 1.305e-05/0.7931, allocations: 0 / 405.4 MB, free: 11.68 MB / 314.7 MB
Notification: Performance of preOpt replaceEdgeChange (simulation): time 0.0001257/0.7933, allocations: 7.75 kB / 405.4 MB, free: 11.68 MB / 314.7 MB
Notification: Performance of preOpt inlineArrayEqn (simulation): time 8.586e-06/0.7933, allocations: 3.781 kB / 405.4 MB, free: 11.68 MB / 314.7 MB
Notification: Performance of preOpt removeSimpleEquations (simulation): time 0.002979/0.7963, allocations: 1.13 MB / 406.5 MB, free: 11.11 MB / 314.7 MB
Notification: Performance of preOpt comSubExp (simulation): time 0.001264/0.7976, allocations: 0.6869 MB / 407.2 MB, free: 11.02 MB / 314.7 MB
Notification: Performance of preOpt resolveLoops (simulation): time 0.001282/0.7989, allocations: 0.6624 MB / 407.9 MB, free: 10.85 MB / 314.7 MB
Notification: Performance of preOpt evalFunc (simulation): time 1.495e-05/0.7989, allocations: 0 / 407.9 MB, free: 10.85 MB / 314.7 MB
Notification: Performance of preOpt encapsulateWhenConditions (simulation): time 0.001667/0.8006, allocations: 0.7377 MB / 408.6 MB, free: 10.23 MB / 314.7 MB
Notification: Performance of pre-optimization done (n=33): time 2.865e-06/0.8006, allocations: 0 / 408.6 MB, free: 10.23 MB / 314.7 MB
Notification: Performance of matching and sorting (n=33): time 0.003235/0.8039, allocations: 1.096 MB / 409.7 MB, free: 9.375 MB / 314.7 MB
Notification: Performance of inlineWhenForInitialization (initialization): time 0.0003491/0.8043, allocations: 327.5 kB / 410 MB, free: 9.016 MB / 314.7 MB
Notification: Performance of selectInitializationVariablesDAE (initialization): time 0.004585/0.8089, allocations: 1.559 MB / 411.6 MB, free: 7.727 MB / 314.7 MB
Notification: Performance of collectPreVariables (initialization): time 0.0002739/0.8092, allocations: 44.88 kB / 411.6 MB, free: 7.68 MB / 314.7 MB
Notification: Performance of collectInitialEqns (initialization): time 0.0004639/0.8097, allocations: 243.6 kB / 411.9 MB, free: 7.531 MB / 314.7 MB
Notification: Performance of collectInitialBindings (initialization): time 0.0002319/0.8099, allocations: 80.84 kB / 411.9 MB, free: 7.465 MB / 314.7 MB
Notification: Performance of simplifyInitialFunctions (initialization): time 0.0001081/0.81, allocations: 11.38 kB / 411.9 MB, free: 7.457 MB / 314.7 MB
Notification: Performance of setup shared object (initialization): time 0.0003044/0.8104, allocations: 384.9 kB / 412.3 MB, free: 7.094 MB / 314.7 MB
Notification: Performance of preBalanceInitialSystem (initialization): time 0.001166/0.8115, allocations: 439.7 kB / 412.7 MB, free: 6.801 MB / 314.7 MB
Notification: Performance of partitionIndependentBlocks (initialization): time 0.001131/0.8127, allocations: 436.9 kB / 413.2 MB, free: 6.512 MB / 314.7 MB
Notification: Performance of analyzeInitialSystem (initialization): time 0.0007665/0.8135, allocations: 293.2 kB / 413.5 MB, free: 6.309 MB / 314.7 MB
Notification: Performance of solveInitialSystemEqSystem (initialization): time 6.722e-06/0.8135, allocations: 112 / 413.5 MB, free: 6.309 MB / 314.7 MB
Notification: Performance of matching and sorting (n=37) (initialization): time 0.00303/0.8166, allocations: 1.027 MB / 414.5 MB, free: 5.527 MB / 314.7 MB
Notification: Performance of prepare postOptimizeDAE: time 0.0003829/0.817, allocations: 297 kB / 414.8 MB, free: 5.215 MB / 314.7 MB
Notification: Performance of postOpt simplifyComplexFunction (initialization): time 1.025e-05/0.817, allocations: 0 / 414.8 MB, free: 5.215 MB / 314.7 MB
Notification: Performance of postOpt tearingSystem (initialization): time 2.383e-05/0.8171, allocations: 4 kB / 414.8 MB, free: 5.211 MB / 314.7 MB
Notification: Performance of postOpt solveSimpleEquations (initialization): time 4.045e-05/0.8171, allocations: 3.938 kB / 414.8 MB, free: 5.207 MB / 314.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (initialization): time 6.352e-06/0.8171, allocations: 0 / 414.8 MB, free: 5.207 MB / 314.7 MB
Notification: Performance of postOpt simplifyAllExpressions (initialization): time 0.0008619/0.818, allocations: 39.97 kB / 414.8 MB, free: 5.168 MB / 314.7 MB
Notification: Performance of postOpt collapseArrayExpressions (initialization): time 0.0003069/0.8183, allocations: 131 kB / 415 MB, free: 5.043 MB / 314.7 MB
Notification: Model statistics after passing the back-end for initialization:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 37 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,$PRE.dLATREGSRH.delay.inertialDelaySensitive[1].x,dLATREGSRH.delay.inertialDelaySensitive[1].x,$PRE.dLATREGSRH.delay.inertialDelaySensitive[1].y,dLATREGSRH.delay.inertialDelaySensitive[1].y,dLATREGSRH.delay.inertialDelaySensitive[1].delayTime,dLATREGSRH.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[1].y_old,dLATREGSRH.delay.inertialDelaySensitive[1].lh,dLATREGSRH.delay.inertialDelaySensitive[1].t_next,$PRE.dLATREGSRH.delay.inertialDelaySensitive[2].x,dLATREGSRH.delay.inertialDelaySensitive[2].x,$PRE.dLATREGSRH.delay.inertialDelaySensitive[2].y,dLATREGSRH.delay.inertialDelaySensitive[2].y,dLATREGSRH.delay.inertialDelaySensitive[2].delayTime,dLATREGSRH.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[2].y_old,dLATREGSRH.delay.inertialDelaySensitive[2].lh,dLATREGSRH.delay.inertialDelaySensitive[2].t_next,dLATREGSRH.dLATSR.dataIn[1],dLATREGSRH.dLATSR.dataIn[2],dLATREGSRH.dLATSR.dataOut[1],dLATREGSRH.dLATSR.dataOut[2],dLATREGSRH.dLATSR.enable_flag,dLATREGSRH.dLATSR.reset_set_flag,dLATREGSRH.dLATSR.nextstate[1],dLATREGSRH.dLATSR.nextstate[2],dLATREGSRH.dLATSR.next_assign_val[1],dLATREGSRH.dLATSR.next_assign_val[2])
 * Number of discrete states: 0 ()
 * Top-level inputs: 0
Notification: Strong component statistics for initialization (16):
 * Single equations (assignments): 8
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of prepare postOptimizeDAE: time 0.0007659/0.8191, allocations: 462 kB / 415.4 MB, free: 4.566 MB / 314.7 MB
Notification: Performance of postOpt lateInlineFunction (simulation): time 0.000353/0.8195, allocations: 134.4 kB / 415.5 MB, free: 4.434 MB / 314.7 MB
Notification: Performance of postOpt wrapFunctionCalls (simulation): time 0.0009348/0.8204, allocations: 257 kB / 415.8 MB, free: 4.207 MB / 314.7 MB
Notification: Performance of postOpt inlineArrayEqn (simulation): time 5.641e-06/0.8204, allocations: 0 / 415.8 MB, free: 4.207 MB / 314.7 MB
Notification: Performance of postOpt constantLinearSystem (simulation): time 6.272e-06/0.8205, allocations: 0 / 415.8 MB, free: 4.207 MB / 314.7 MB
Notification: Performance of postOpt simplifysemiLinear (simulation): time 5.721e-06/0.8205, allocations: 0 / 415.8 MB, free: 4.207 MB / 314.7 MB
Notification: Performance of postOpt removeSimpleEquations (simulation): time 0.00572/0.8262, allocations: 2.025 MB / 417.8 MB, free: 2.602 MB / 314.7 MB
Notification: Performance of postOpt simplifyComplexFunction (simulation): time 7.905e-06/0.8263, allocations: 0 / 417.8 MB, free: 2.602 MB / 314.7 MB
Notification: Performance of postOpt solveSimpleEquations (simulation): time 2.469e-05/0.8263, allocations: 0 / 417.8 MB, free: 2.602 MB / 314.7 MB
Notification: Performance of postOpt tearingSystem (simulation): time 2.127e-05/0.8264, allocations: 4 kB / 417.8 MB, free: 2.598 MB / 314.7 MB
Notification: Performance of postOpt inputDerivativesUsed (simulation): time 0.0001718/0.8265, allocations: 36.34 kB / 417.9 MB, free: 2.566 MB / 314.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (simulation): time 6.793e-06/0.8266, allocations: 3.938 kB / 417.9 MB, free: 2.562 MB / 314.7 MB
Notification: Performance of postOpt calculateStateSetsJacobians (simulation): time 4.098e-06/0.8266, allocations: 0 / 417.9 MB, free: 2.562 MB / 314.7 MB
Notification: Performance of postOpt symbolicJacobian (simulation): time 0.003688/0.8303, allocations: 1.289 MB / 419.1 MB, free: 1.254 MB / 314.7 MB
Notification: Performance of postOpt removeConstants (simulation): time 0.002422/0.8328, allocations: 0.6708 MB / 419.8 MB, free: 0.5625 MB / 314.7 MB
Notification: Performance of postOpt simplifyTimeIndepFuncCalls (simulation): time 0.0003926/0.8332, allocations: 63.95 kB / 419.9 MB, free: 0.5 MB / 314.7 MB
Notification: Performance of postOpt simplifyAllExpressions (simulation): time 0.0008362/0.834, allocations: 39.88 kB / 419.9 MB, free: 472 kB / 314.7 MB
Notification: Performance of postOpt findZeroCrossings (simulation): time 0.001289/0.8354, allocations: 375.6 kB / 420.3 MB, free: 96 kB / 314.7 MB
Notification: Performance of postOpt collapseArrayExpressions (simulation): time 0.0003481/0.8357, allocations: 128 kB / 420.4 MB, free: 15.96 MB / 330.7 MB
Notification: Performance of sorting global known variables: time 0.005292/0.841, allocations: 1.275 MB / 421.7 MB, free: 14.69 MB / 330.7 MB
Notification: Performance of sort global known variables: time 1.222e-06/0.8411, allocations: 0 / 421.7 MB, free: 14.69 MB / 330.7 MB
Notification: Performance of remove unused functions: time 0.002083/0.8432, allocations: 140 kB / 421.8 MB, free: 14.55 MB / 330.7 MB
Notification: Model statistics after passing the back-end for simulation:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 33 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRH.delay.inertialDelaySensitive[1].x,dLATREGSRH.delay.inertialDelaySensitive[1].y,dLATREGSRH.delay.inertialDelaySensitive[1].delayTime,dLATREGSRH.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[1].y_old,dLATREGSRH.delay.inertialDelaySensitive[1].lh,dLATREGSRH.delay.inertialDelaySensitive[1].t_next,dLATREGSRH.delay.inertialDelaySensitive[2].x,dLATREGSRH.delay.inertialDelaySensitive[2].y,dLATREGSRH.delay.inertialDelaySensitive[2].delayTime,dLATREGSRH.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[2].y_old,dLATREGSRH.delay.inertialDelaySensitive[2].lh,dLATREGSRH.delay.inertialDelaySensitive[2].t_next,dLATREGSRH.dLATSR.dataIn[1],dLATREGSRH.dLATSR.dataIn[2],dLATREGSRH.dLATSR.dataOut[1],dLATREGSRH.dLATSR.dataOut[2],dLATREGSRH.dLATSR.enable_flag,dLATREGSRH.dLATSR.reset_set_flag,dLATREGSRH.dLATSR.nextstate[1],dLATREGSRH.dLATSR.nextstate[2],dLATREGSRH.dLATSR.next_assign_val[1],dLATREGSRH.dLATSR.next_assign_val[2])
 * Number of discrete states: 31 (enable.y,data_0.y,reset.y,data_1.y,set.y,dLATREGSRH.dLATSR.dataOut[2],dLATREGSRH.dLATSR.dataOut[1],dLATREGSRH.dLATSR.next_assign_val[2],dLATREGSRH.dLATSR.next_assign_val[1],dLATREGSRH.dLATSR.nextstate[2],dLATREGSRH.dLATSR.nextstate[1],dLATREGSRH.dLATSR.reset_set_flag,dLATREGSRH.dLATSR.enable_flag,dLATREGSRH.delay.inertialDelaySensitive[2].y,dLATREGSRH.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[2].t_next,dLATREGSRH.delay.inertialDelaySensitive[2].delayTime,dLATREGSRH.delay.inertialDelaySensitive[2].lh,dLATREGSRH.delay.inertialDelaySensitive[2].y_old,$whenCondition2,$whenCondition1,dLATREGSRH.delay.inertialDelaySensitive[2].x,dLATREGSRH.delay.inertialDelaySensitive[1].y,dLATREGSRH.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[1].t_next,dLATREGSRH.delay.inertialDelaySensitive[1].delayTime,dLATREGSRH.delay.inertialDelaySensitive[1].lh,dLATREGSRH.delay.inertialDelaySensitive[1].y_old,$whenCondition4,$whenCondition3,dLATREGSRH.delay.inertialDelaySensitive[1].x)
 * Top-level inputs: 0
Notification: Strong component statistics for simulation (12):
 * Single equations (assignments): 4
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of Backend phase and start with SimCode phase: time 0.006889/0.8501, allocations: 1.919 MB / 423.7 MB, free: 12.61 MB / 330.7 MB
Notification: Performance of simCode: created initialization part: time 0.005967/0.8562, allocations: 1.889 MB / 425.6 MB, free: 10.62 MB / 330.7 MB
Notification: Performance of simCode: created event and clocks part: time 7.674e-06/0.8562, allocations: 3.938 kB / 425.6 MB, free: 10.62 MB / 330.7 MB
Notification: Performance of simCode: created simulation system equations: time 0.00421/0.8605, allocations: 1.409 MB / 427 MB, free: 9.109 MB / 330.7 MB
Notification: Performance of simCode: created of all other equations (e.g. parameter, nominal, assert, etc): time 0.004205/0.8647, allocations: 292.2 kB / 427.3 MB, free: 8.824 MB / 330.7 MB
Notification: Performance of simCode: created linear, non-linear and system jacobian parts: time 0.01457/0.8794, allocations: 2.721 MB / 430 MB, free: 6.051 MB / 330.7 MB
Notification: Performance of simCode: some other stuff during SimCode phase: time 0.003194/0.8826, allocations: 1.223 MB / 431.3 MB, free: 4.801 MB / 330.7 MB
Notification: Performance of simCode: alias equations: time 0.0004281/0.8831, allocations: 37.81 kB / 431.3 MB, free: 4.762 MB / 330.7 MB
Notification: Performance of simCode: all other stuff during SimCode phase: time 0.0004389/0.8836, allocations: 135.4 kB / 431.4 MB, free: 4.629 MB / 330.7 MB
Notification: Performance of SimCode: time 6.812e-06/0.8836, allocations: 0 / 431.4 MB, free: 4.629 MB / 330.7 MB
Notification: Performance of buildModelFMU: Generate the FMI files: time 0.1121/0.9957, allocations: 20.41 MB / 451.8 MB, free: 15.91 MB / 362.7 MB
Notification: Performance of buildModelFMU: configured platform dynamic using cached values: time 0.0003525/0.9961, allocations: 142.7 kB / 452 MB, free: 15.71 MB / 362.7 MB
Notification: Performance of buildModelFMU: Generate platform dynamic: time 3.923/4.919, allocations: 0 / 452 MB, free: 15.71 MB / 362.7 MB
""

Variables in the reference:time,dLATREGSRH.delay.inertialDelaySensitive[1].x,dLATREGSRH.delay.inertialDelaySensitive[1].y,dLATREGSRH.delay.inertialDelaySensitive[2].x,dLATREGSRH.delay.inertialDelaySensitive[2].y

Variables in the result:_D_whenCondition1,_D_whenCondition2,_D_whenCondition3,_D_whenCondition4,dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dLATREGSRH.dLATSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dLATREGSRH.dLATSR.dataIn[1],dLATREGSRH.dLATSR.dataIn[2],dLATREGSRH.dLATSR.dataOut[1],dLATREGSRH.dLATSR.dataOut[2],dLATREGSRH.dLATSR.enable,dLATREGSRH.dLATSR.enable_flag,dLATREGSRH.dLATSR.n,dLATREGSRH.dLATSR.next_assign_val[1],dLATREGSRH.dLATSR.next_assign_val[2],dLATREGSRH.dLATSR.nextstate[1],dLATREGSRH.dLATSR.nextstate[2],dLATREGSRH.dLATSR.reset,dLATREGSRH.dLATSR.reset_set_flag,dLATREGSRH.dLATSR.set,dLATREGSRH.dLATSR.strength,dLATREGSRH.dataIn[1],dLATREGSRH.dataIn[2],dLATREGSRH.dataOut[1],dLATREGSRH.dataOut[2],dLATREGSRH.delay.inertialDelaySensitive[1].delayTime,dLATREGSRH.delay.inertialDelaySensitive[1].lh,dLATREGSRH.delay.inertialDelaySensitive[1].tHL,dLATREGSRH.delay.inertialDelaySensitive[1].tLH,dLATREGSRH.delay.inertialDelaySensitive[1].t_next,dLATREGSRH.delay.inertialDelaySensitive[1].x,dLATREGSRH.delay.inertialDelaySensitive[1].y,dLATREGSRH.delay.inertialDelaySensitive[1].y0,dLATREGSRH.delay.inertialDelaySensitive[1].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[1].y_old,dLATREGSRH.delay.inertialDelaySensitive[2].delayTime,dLATREGSRH.delay.inertialDelaySensitive[2].lh,dLATREGSRH.delay.inertialDelaySensitive[2].tHL,dLATREGSRH.delay.inertialDelaySensitive[2].tLH,dLATREGSRH.delay.inertialDelaySensitive[2].t_next,dLATREGSRH.delay.inertialDelaySensitive[2].x,dLATREGSRH.delay.inertialDelaySensitive[2].y,dLATREGSRH.delay.inertialDelaySensitive[2].y0,dLATREGSRH.delay.inertialDelaySensitive[2].y_auxiliary,dLATREGSRH.delay.inertialDelaySensitive[2].y_old,dLATREGSRH.delay.n,dLATREGSRH.delay.tHL,dLATREGSRH.delay.tLH,dLATREGSRH.delay.x[1],dLATREGSRH.delay.x[2],dLATREGSRH.delay.y[1],dLATREGSRH.delay.y[2],dLATREGSRH.enable,dLATREGSRH.n,dLATREGSRH.reset,dLATREGSRH.set,dLATREGSRH.strength,dLATREGSRH.tHL,dLATREGSRH.tLH,data_0.n,data_0.t[1],data_0.t[2],data_0.x[1],data_0.x[2],data_0.y,data_0.y0,data_1.n,data_1.t[1],data_1.t[2],data_1.x[1],data_1.x[2],data_1.y,data_1.y0,enable.n,enable.t[1],enable.t[2],enable.t[3],enable.x[1],enable.x[2],enable.x[3],enable.y,enable.y0,reset.n,reset.t[1],reset.t[2],reset.t[3],reset.t[4],reset.t[5],reset.x[1],reset.x[2],reset.x[3],reset.x[4],reset.x[5],reset.y,reset.y0,set.n,set.t[1],set.t[2],set.t[3],set.x[1],set.x[2],set.x[3],set.y,set.y0,time