Running command: "" <> buildModelFMU(Modelica.Electrical.Digital.Examples.DFFREGSRH,fileNamePrefix="Modelica_3_2_2_cs_Modelica_Electrical_Digital_Examples_DFFREGSRH",fmuType="cs",version="2.0",platforms={"dynamic"})
Notification: Performance of loadModel(Modelica): time 2.351/2.351, allocations: 195 MB / 202.9 MB, free: 6.727 MB / 170.7 MB
Notification: Performance of FrontEnd - loaded program: time 4.107e-05/4.119e-05, allocations: 4.438 kB / 249.7 MB, free: 5.27 MB / 202.7 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 0.1706/0.1706, allocations: 44.52 MB / 294.3 MB, free: 10.66 MB / 250.7 MB
Notification: Performance of FrontEnd - scodeFlatten: time 0.4812/0.6519, allocations: 77.46 MB / 371.7 MB, free: 7.23 MB / 298.7 MB
Notification: Performance of FrontEnd - mkProgramGraph: time 0.0002993/0.6522, allocations: 69.16 kB / 371.8 MB, free: 7.23 MB / 298.7 MB
Notification: Performance of FrontEnd - DAE generated: time 0.1429/0.7952, allocations: 31.01 MB / 402.8 MB, free: 13.35 MB / 314.7 MB
Notification: Performance of FrontEnd: time 2.845e-06/0.7953, allocations: 4 kB / 402.8 MB, free: 13.35 MB / 314.7 MB
Notification: Performance of Transformations before backend: time 6.141e-05/0.7953, allocations: 19.47 kB / 402.8 MB, free: 13.34 MB / 314.7 MB
Notification: Model statistics after passing the front-end and creating the data structures used by the back-end:
 * Number of equations: 43
 * Number of variables: 43
Notification: Performance of Generate backend data structure: time 0.002661/0.798, allocations: 1.301 MB / 404.1 MB, free: 12.27 MB / 314.7 MB
Notification: Performance of prepare preOptimizeDAE: time 5.76e-05/0.7981, allocations: 11.69 kB / 404.1 MB, free: 12.27 MB / 314.7 MB
Notification: Performance of preOpt introduceOutputAliases (simulation): time 0.000258/0.7984, allocations: 53.92 kB / 404.2 MB, free: 12.23 MB / 314.7 MB
Notification: Performance of preOpt normalInlineFunction (simulation): time 0.0003471/0.7987, allocations: 128.6 kB / 404.3 MB, free: 12.16 MB / 314.7 MB
Notification: Performance of preOpt evaluateParameters (simulation): time 0.001283/0.8, allocations: 0.5147 MB / 404.8 MB, free: 11.81 MB / 314.7 MB
Notification: Performance of preOpt simplifyIfEquations (simulation): time 7.059e-05/0.8001, allocations: 19.38 kB / 404.8 MB, free: 11.81 MB / 314.7 MB
Notification: Performance of preOpt expandDerOperator (simulation): time 0.0001613/0.8003, allocations: 22.94 kB / 404.9 MB, free: 11.81 MB / 314.7 MB
Notification: Performance of preOpt removeEqualFunctionCalls (simulation): time 0.001125/0.8014, allocations: 451.6 kB / 405.3 MB, free: 11.74 MB / 314.7 MB
Notification: Performance of preOpt clockPartitioning (simulation): time 0.001538/0.803, allocations: 0.5905 MB / 405.9 MB, free: 11.58 MB / 314.7 MB
Notification: Performance of preOpt findStateOrder (simulation): time 1.46e-05/0.803, allocations: 0 / 405.9 MB, free: 11.58 MB / 314.7 MB
Notification: Performance of preOpt replaceEdgeChange (simulation): time 0.0001197/0.8032, allocations: 11.75 kB / 405.9 MB, free: 11.58 MB / 314.7 MB
Notification: Performance of preOpt inlineArrayEqn (simulation): time 9.157e-06/0.8032, allocations: 3.812 kB / 405.9 MB, free: 11.58 MB / 314.7 MB
Notification: Performance of preOpt removeSimpleEquations (simulation): time 0.002955/0.8062, allocations: 1.058 MB / 407 MB, free: 11.02 MB / 314.7 MB
Notification: Performance of preOpt comSubExp (simulation): time 0.001423/0.8076, allocations: 0.6785 MB / 407.7 MB, free: 10.93 MB / 314.7 MB
Notification: Performance of preOpt resolveLoops (simulation): time 0.00143/0.8091, allocations: 0.6539 MB / 408.3 MB, free: 10.64 MB / 314.7 MB
Notification: Performance of preOpt evalFunc (simulation): time 2.196e-05/0.8092, allocations: 0 / 408.3 MB, free: 10.64 MB / 314.7 MB
Notification: Performance of preOpt encapsulateWhenConditions (simulation): time 0.001885/0.8111, allocations: 0.7559 MB / 409.1 MB, free: 10 MB / 314.7 MB
Notification: Performance of pre-optimization done (n=36): time 3.787e-06/0.8111, allocations: 0 / 409.1 MB, free: 10 MB / 314.7 MB
Notification: Performance of matching and sorting (n=36): time 0.00344/0.8146, allocations: 1.108 MB / 410.2 MB, free: 9.133 MB / 314.7 MB
Notification: Performance of inlineWhenForInitialization (initialization): time 0.0003549/0.815, allocations: 323.7 kB / 410.5 MB, free: 8.777 MB / 314.7 MB
Notification: Performance of selectInitializationVariablesDAE (initialization): time 0.004907/0.8199, allocations: 1.539 MB / 412 MB, free: 7.5 MB / 314.7 MB
Notification: Performance of collectPreVariables (initialization): time 0.000321/0.8203, allocations: 49.19 kB / 412.1 MB, free: 7.449 MB / 314.7 MB
Notification: Performance of collectInitialEqns (initialization): time 0.0004765/0.8208, allocations: 228.5 kB / 412.3 MB, free: 7.309 MB / 314.7 MB
Notification: Performance of collectInitialBindings (initialization): time 0.0002878/0.8211, allocations: 85.19 kB / 412.4 MB, free: 7.238 MB / 314.7 MB
Notification: Performance of simplifyInitialFunctions (initialization): time 0.0001196/0.8212, allocations: 15.38 kB / 412.4 MB, free: 7.227 MB / 314.7 MB
Notification: Performance of setup shared object (initialization): time 0.0003006/0.8215, allocations: 379.5 kB / 412.8 MB, free: 6.867 MB / 314.7 MB
Notification: Performance of preBalanceInitialSystem (initialization): time 0.001235/0.8228, allocations: 434 kB / 413.2 MB, free: 6.578 MB / 314.7 MB
Notification: Performance of partitionIndependentBlocks (initialization): time 0.001186/0.824, allocations: 437.3 kB / 413.6 MB, free: 6.289 MB / 314.7 MB
Notification: Performance of analyzeInitialSystem (initialization): time 0.0007852/0.8248, allocations: 292.4 kB / 413.9 MB, free: 6.094 MB / 314.7 MB
Notification: Performance of solveInitialSystemEqSystem (initialization): time 4.759e-06/0.8248, allocations: 0 / 413.9 MB, free: 6.094 MB / 314.7 MB
Notification: Performance of matching and sorting (n=43) (initialization): time 0.003174/0.828, allocations: 1.03 MB / 414.9 MB, free: 5.312 MB / 314.7 MB
Notification: Performance of prepare postOptimizeDAE: time 0.000408/0.8285, allocations: 289.5 kB / 415.2 MB, free: 5.004 MB / 314.7 MB
Notification: Performance of postOpt simplifyComplexFunction (initialization): time 1.121e-05/0.8285, allocations: 0 / 415.2 MB, free: 5.004 MB / 314.7 MB
Notification: Performance of postOpt tearingSystem (initialization): time 2.676e-05/0.8285, allocations: 8 kB / 415.2 MB, free: 4.996 MB / 314.7 MB
Notification: Performance of postOpt solveSimpleEquations (initialization): time 4.97e-05/0.8286, allocations: 3.938 kB / 415.2 MB, free: 4.992 MB / 314.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (initialization): time 9.859e-06/0.8286, allocations: 3.953 kB / 415.2 MB, free: 4.988 MB / 314.7 MB
Notification: Performance of postOpt simplifyAllExpressions (initialization): time 0.0008455/0.8295, allocations: 37.47 kB / 415.3 MB, free: 4.953 MB / 314.7 MB
Notification: Performance of postOpt collapseArrayExpressions (initialization): time 0.0003788/0.8299, allocations: 162.3 kB / 415.4 MB, free: 4.801 MB / 314.7 MB
Notification: Model statistics after passing the back-end for initialization:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 43 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,clock.y,data_0.y,reset.y,data_1.y,set.y,$PRE.dFFREGSRH.delay.inertialDelaySensitive[1].x,dFFREGSRH.delay.inertialDelaySensitive[1].x,$PRE.dFFREGSRH.delay.inertialDelaySensitive[1].y,dFFREGSRH.delay.inertialDelaySensitive[1].y,dFFREGSRH.delay.inertialDelaySensitive[1].delayTime,dFFREGSRH.delay.inertialDelaySensitive[1].y_auxiliary,dFFREGSRH.delay.inertialDelaySensitive[1].y_old,dFFREGSRH.delay.inertialDelaySensitive[1].lh,dFFREGSRH.delay.inertialDelaySensitive[1].t_next,$PRE.dFFREGSRH.delay.inertialDelaySensitive[2].x,dFFREGSRH.delay.inertialDelaySensitive[2].x,$PRE.dFFREGSRH.delay.inertialDelaySensitive[2].y,dFFREGSRH.delay.inertialDelaySensitive[2].y,dFFREGSRH.delay.inertialDelaySensitive[2].delayTime,dFFREGSRH.delay.inertialDelaySensitive[2].y_auxiliary,dFFREGSRH.delay.inertialDelaySensitive[2].y_old,dFFREGSRH.delay.inertialDelaySensitive[2].lh,dFFREGSRH.delay.inertialDelaySensitive[2].t_next,$PRE.dFFREGSRH.dFFSR.set,dFFREGSRH.dFFSR.set,$PRE.dFFREGSRH.dFFSR.reset,dFFREGSRH.dFFSR.reset,$PRE.dFFREGSRH.dFFSR.clock,dFFREGSRH.dFFSR.clock,dFFREGSRH.dFFSR.dataIn[1],dFFREGSRH.dFFSR.dataIn[2],dFFREGSRH.dFFSR.dataOut[1],dFFREGSRH.dFFSR.dataOut[2],dFFREGSRH.dFFSR.clock_flag,dFFREGSRH.dFFSR.reset_set_flag,dFFREGSRH.dFFSR.nextstate[1],dFFREGSRH.dFFSR.nextstate[2],dFFREGSRH.dFFSR.next_assign_val[1],dFFREGSRH.dFFSR.next_assign_val[2])
 * Number of discrete states: 0 ()
 * Top-level inputs: 0
Notification: Strong component statistics for initialization (22):
 * Single equations (assignments): 14
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of prepare postOptimizeDAE: time 0.0008825/0.8308, allocations: 463.7 kB / 415.9 MB, free: 4.32 MB / 314.7 MB
Notification: Performance of postOpt lateInlineFunction (simulation): time 0.0003921/0.8312, allocations: 138.4 kB / 416 MB, free: 4.184 MB / 314.7 MB
Notification: Performance of postOpt wrapFunctionCalls (simulation): time 0.0009883/0.8322, allocations: 249.7 kB / 416.3 MB, free: 3.957 MB / 314.7 MB
Notification: Performance of postOpt inlineArrayEqn (simulation): time 1.115e-05/0.8322, allocations: 4 kB / 416.3 MB, free: 3.953 MB / 314.7 MB
Notification: Performance of postOpt constantLinearSystem (simulation): time 7.705e-06/0.8323, allocations: 0 / 416.3 MB, free: 3.953 MB / 314.7 MB
Notification: Performance of postOpt simplifysemiLinear (simulation): time 1.015e-05/0.8323, allocations: 3.953 kB / 416.3 MB, free: 3.949 MB / 314.7 MB
Notification: Performance of postOpt removeSimpleEquations (simulation): time 0.006144/0.8384, allocations: 2.013 MB / 418.3 MB, free: 2.246 MB / 314.7 MB
Notification: Performance of postOpt simplifyComplexFunction (simulation): time 8.515e-06/0.8385, allocations: 0 / 418.3 MB, free: 2.246 MB / 314.7 MB
Notification: Performance of postOpt solveSimpleEquations (simulation): time 2.997e-05/0.8386, allocations: 4 kB / 418.3 MB, free: 2.242 MB / 314.7 MB
Notification: Performance of postOpt tearingSystem (simulation): time 9.027e-06/0.8386, allocations: 0 / 418.3 MB, free: 2.242 MB / 314.7 MB
Notification: Performance of postOpt inputDerivativesUsed (simulation): time 0.000191/0.8388, allocations: 39.97 kB / 418.3 MB, free: 2.203 MB / 314.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (simulation): time 7.164e-06/0.8388, allocations: 4 kB / 418.3 MB, free: 2.199 MB / 314.7 MB
Notification: Performance of postOpt calculateStateSetsJacobians (simulation): time 6.953e-06/0.8388, allocations: 3.953 kB / 418.3 MB, free: 2.195 MB / 314.7 MB
Notification: Performance of postOpt symbolicJacobian (simulation): time 0.003791/0.8426, allocations: 1.261 MB / 419.6 MB, free: 0.9141 MB / 314.7 MB
Notification: Performance of postOpt removeConstants (simulation): time 0.002517/0.8452, allocations: 0.6786 MB / 420.3 MB, free: 220 kB / 314.7 MB
Notification: Performance of postOpt simplifyTimeIndepFuncCalls (simulation): time 0.0004188/0.8457, allocations: 59.97 kB / 420.3 MB, free: 160 kB / 314.7 MB
Notification: Performance of postOpt simplifyAllExpressions (simulation): time 0.0008181/0.8465, allocations: 43.84 kB / 420.4 MB, free: 116 kB / 314.7 MB
Notification: Performance of postOpt findZeroCrossings (simulation): time 0.001249/0.8478, allocations: 355.6 kB / 420.7 MB, free: 15.77 MB / 330.7 MB
Notification: Performance of postOpt collapseArrayExpressions (simulation): time 0.0003952/0.8482, allocations: 155.9 kB / 420.9 MB, free: 15.61 MB / 330.7 MB
Notification: Performance of sorting global known variables: time 0.003854/0.8521, allocations: 1.262 MB / 422.1 MB, free: 14.35 MB / 330.7 MB
Notification: Performance of sort global known variables: time 1.092e-06/0.8521, allocations: 0 / 422.1 MB, free: 14.35 MB / 330.7 MB
Notification: Performance of remove unused functions: time 0.001205/0.8533, allocations: 144 kB / 422.3 MB, free: 14.21 MB / 330.7 MB
Notification: Model statistics after passing the back-end for simulation:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 36 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,clock.y,data_0.y,reset.y,data_1.y,set.y,dFFREGSRH.delay.inertialDelaySensitive[1].x,dFFREGSRH.delay.inertialDelaySensitive[1].y,dFFREGSRH.delay.inertialDelaySensitive[1].delayTime,dFFREGSRH.delay.inertialDelaySensitive[1].y_auxiliary,dFFREGSRH.delay.inertialDelaySensitive[1].y_old,dFFREGSRH.delay.inertialDelaySensitive[1].lh,dFFREGSRH.delay.inertialDelaySensitive[1].t_next,dFFREGSRH.delay.inertialDelaySensitive[2].x,dFFREGSRH.delay.inertialDelaySensitive[2].y,dFFREGSRH.delay.inertialDelaySensitive[2].delayTime,dFFREGSRH.delay.inertialDelaySensitive[2].y_auxiliary,dFFREGSRH.delay.inertialDelaySensitive[2].y_old,dFFREGSRH.delay.inertialDelaySensitive[2].lh,dFFREGSRH.delay.inertialDelaySensitive[2].t_next,dFFREGSRH.dFFSR.set,dFFREGSRH.dFFSR.reset,dFFREGSRH.dFFSR.clock,dFFREGSRH.dFFSR.dataIn[1],dFFREGSRH.dFFSR.dataIn[2],dFFREGSRH.dFFSR.dataOut[1],dFFREGSRH.dFFSR.dataOut[2],dFFREGSRH.dFFSR.clock_flag,dFFREGSRH.dFFSR.reset_set_flag,dFFREGSRH.dFFSR.nextstate[1],dFFREGSRH.dFFSR.nextstate[2],dFFREGSRH.dFFSR.next_assign_val[1],dFFREGSRH.dFFSR.next_assign_val[2])
 * Number of discrete states: 34 (set.y,data_1.y,reset.y,data_0.y,clock.y,dFFREGSRH.dFFSR.dataOut[2],dFFREGSRH.dFFSR.dataOut[1],dFFREGSRH.dFFSR.next_assign_val[2],dFFREGSRH.dFFSR.next_assign_val[1],dFFREGSRH.dFFSR.nextstate[2],dFFREGSRH.dFFSR.nextstate[1],dFFREGSRH.dFFSR.reset_set_flag,dFFREGSRH.dFFSR.clock_flag,dFFREGSRH.dFFSR.clock,dFFREGSRH.dFFSR.reset,dFFREGSRH.dFFSR.set,dFFREGSRH.delay.inertialDelaySensitive[2].y,dFFREGSRH.delay.inertialDelaySensitive[2].y_auxiliary,dFFREGSRH.delay.inertialDelaySensitive[2].t_next,dFFREGSRH.delay.inertialDelaySensitive[2].delayTime,dFFREGSRH.delay.inertialDelaySensitive[2].lh,dFFREGSRH.delay.inertialDelaySensitive[2].y_old,$whenCondition4,$whenCondition3,dFFREGSRH.delay.inertialDelaySensitive[2].x,dFFREGSRH.delay.inertialDelaySensitive[1].y,dFFREGSRH.delay.inertialDelaySensitive[1].y_auxiliary,dFFREGSRH.delay.inertialDelaySensitive[1].t_next,dFFREGSRH.delay.inertialDelaySensitive[1].delayTime,dFFREGSRH.delay.inertialDelaySensitive[1].lh,dFFREGSRH.delay.inertialDelaySensitive[1].y_old,$whenCondition2,$whenCondition1,dFFREGSRH.delay.inertialDelaySensitive[1].x)
 * Top-level inputs: 0
Notification: Strong component statistics for simulation (15):
 * Single equations (assignments): 7
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of Backend phase and start with SimCode phase: time 0.004511/0.8579, allocations: 1.923 MB / 424.2 MB, free: 12.26 MB / 330.7 MB
Notification: Performance of simCode: created initialization part: time 0.004051/0.862, allocations: 1.866 MB / 426.1 MB, free: 10.29 MB / 330.7 MB
Notification: Performance of simCode: created event and clocks part: time 5.02e-06/0.862, allocations: 0 / 426.1 MB, free: 10.29 MB / 330.7 MB
Notification: Performance of simCode: created simulation system equations: time 0.002695/0.8647, allocations: 1.374 MB / 427.4 MB, free: 8.82 MB / 330.7 MB
Notification: Performance of simCode: created of all other equations (e.g. parameter, nominal, assert, etc): time 0.002768/0.8675, allocations: 303.7 kB / 427.7 MB, free: 8.527 MB / 330.7 MB
Notification: Performance of simCode: created linear, non-linear and system jacobian parts: time 0.009407/0.877, allocations: 2.679 MB / 430.4 MB, free: 5.793 MB / 330.7 MB
Notification: Performance of simCode: some other stuff during SimCode phase: time 0.002102/0.8792, allocations: 1.216 MB / 431.6 MB, free: 4.547 MB / 330.7 MB
Notification: Performance of simCode: alias equations: time 0.000707/0.8799, allocations: 186.9 kB / 431.8 MB, free: 4.359 MB / 330.7 MB
Notification: Performance of simCode: all other stuff during SimCode phase: time 0.0003578/0.8803, allocations: 155.4 kB / 432 MB, free: 4.207 MB / 330.7 MB
Notification: Performance of SimCode: time 1.453e-06/0.8803, allocations: 0 / 432 MB, free: 4.207 MB / 330.7 MB
Notification: Performance of buildModelFMU: Generate the FMI files: time 0.1156/0.9959, allocations: 21.87 MB / 453.8 MB, free: 13.98 MB / 362.7 MB
Notification: Performance of buildModelFMU: configured platform dynamic using cached values: time 0.000334/0.9963, allocations: 137.5 kB / 454 MB, free: 13.79 MB / 362.7 MB
Notification: Performance of buildModelFMU: Generate platform dynamic: time 3.934/4.93, allocations: 3.938 kB / 454 MB, free: 13.78 MB / 362.7 MB
""

Variables in the reference:time,dFFREGSRH.dataOut[1],dFFREGSRH.dataOut[2]

Variables in the result:_D_whenCondition1,_D_whenCondition2,_D_whenCondition3,_D_whenCondition4,clock.n,clock.t[1],clock.t[2],clock.t[3],clock.x[1],clock.x[2],clock.x[3],clock.y,clock.y0,dFFREGSRH.clock,dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRH.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRH.dFFSR.clock,dFFREGSRH.dFFSR.clock_flag,dFFREGSRH.dFFSR.dataIn[1],dFFREGSRH.dFFSR.dataIn[2],dFFREGSRH.dFFSR.dataOut[1],dFFREGSRH.dFFSR.dataOut[2],dFFREGSRH.dFFSR.n,dFFREGSRH.dFFSR.next_assign_val[1],dFFREGSRH.dFFSR.next_assign_val[2],dFFREGSRH.dFFSR.nextstate[1],dFFREGSRH.dFFSR.nextstate[2],dFFREGSRH.dFFSR.reset,dFFREGSRH.dFFSR.reset_set_flag,dFFREGSRH.dFFSR.set,dFFREGSRH.dFFSR.strength,dFFREGSRH.dataIn[1],dFFREGSRH.dataIn[2],dFFREGSRH.dataOut[1],dFFREGSRH.dataOut[2],dFFREGSRH.delay.inertialDelaySensitive[1].delayTime,dFFREGSRH.delay.inertialDelaySensitive[1].lh,dFFREGSRH.delay.inertialDelaySensitive[1].tHL,dFFREGSRH.delay.inertialDelaySensitive[1].tLH,dFFREGSRH.delay.inertialDelaySensitive[1].t_next,dFFREGSRH.delay.inertialDelaySensitive[1].x,dFFREGSRH.delay.inertialDelaySensitive[1].y,dFFREGSRH.delay.inertialDelaySensitive[1].y0,dFFREGSRH.delay.inertialDelaySensitive[1].y_auxiliary,dFFREGSRH.delay.inertialDelaySensitive[1].y_old,dFFREGSRH.delay.inertialDelaySensitive[2].delayTime,dFFREGSRH.delay.inertialDelaySensitive[2].lh,dFFREGSRH.delay.inertialDelaySensitive[2].tHL,dFFREGSRH.delay.inertialDelaySensitive[2].tLH,dFFREGSRH.delay.inertialDelaySensitive[2].t_next,dFFREGSRH.delay.inertialDelaySensitive[2].x,dFFREGSRH.delay.inertialDelaySensitive[2].y,dFFREGSRH.delay.inertialDelaySensitive[2].y0,dFFREGSRH.delay.inertialDelaySensitive[2].y_auxiliary,dFFREGSRH.delay.inertialDelaySensitive[2].y_old,dFFREGSRH.delay.n,dFFREGSRH.delay.tHL,dFFREGSRH.delay.tLH,dFFREGSRH.delay.x[1],dFFREGSRH.delay.x[2],dFFREGSRH.delay.y[1],dFFREGSRH.delay.y[2],dFFREGSRH.n,dFFREGSRH.reset,dFFREGSRH.set,dFFREGSRH.strength,dFFREGSRH.tHL,dFFREGSRH.tLH,data_0.n,data_0.t[1],data_0.x[1],data_0.y,data_0.y0,data_1.n,data_1.t[1],data_1.x[1],data_1.y,data_1.y0,reset.n,reset.t[1],reset.t[2],reset.t[3],reset.x[1],reset.x[2],reset.x[3],reset.y,reset.y0,set.n,set.t[1],set.t[2],set.t[3],set.x[1],set.x[2],set.x[3],set.y,set.y0,time