Running: ./testmodel.py --libraries=/var/lib/jenkins/ws/OpenModelicaLibraryTestingWork/OpenModelica/./OMCompiler/build/lib/omlibrary/ --ompython_omhome=/usr Modelica_3.2.2_Modelica.Electrical.Digital.Examples.DFFREGSRL.conf.json
Using package ModelicaServices with version 3.2.2 (/var/lib/jenkins/ws/OpenModelicaLibraryTestingWork/OpenModelica/OMCompiler/build/lib/omlibrary/ModelicaServices 3.2.2/package.mo)
Using package Complex with version 3.2.2 (/var/lib/jenkins/ws/OpenModelicaLibraryTestingWork/OpenModelica/OMCompiler/build/lib/omlibrary/Complex 3.2.2.mo)
Using package Modelica with version 3.2.2 (/var/lib/jenkins/ws/OpenModelicaLibraryTestingWork/OpenModelica/OMCompiler/build/lib/omlibrary/Modelica 3.2.2/package.mo)
Running command: "" <> buildModelFMU(Modelica.Electrical.Digital.Examples.DFFREGSRL,fileNamePrefix="Modelica_3_2_2_Modelica_Electrical_Digital_Examples_DFFREGSRL",fmuType="me",version="2.0",platforms={"static"})
Notification: Performance of loadModel(Modelica): time 2.067/2.067, allocations: 194.9 MB / 211.1 MB, free: 7.594 MB / 170.7 MB
Notification: Performance of FrontEnd - loaded program: time 0.0003645/0.0003647, allocations: 15.94 kB / 264.1 MB, free: 2.52 MB / 218.7 MB
Notification: Performance of FrontEnd - Absyn->SCode: time 0.2902/0.2906, allocations: 44.5 MB / 308.6 MB, free: 12.66 MB / 250.7 MB
Notification: Performance of NFInst.instantiate(Modelica.Electrical.Digital.Examples.DFFREGSRL): time 0.002486/0.2932, allocations: 1.45 MB / 310 MB, free: 11.2 MB / 250.7 MB
Notification: Performance of NFInst.instExpressions: time 0.003303/0.2965, allocations: 1.023 MB / 311 MB, free: 10.17 MB / 250.7 MB
Notification: Performance of NFInst.updateImplicitVariability: time 0.0001129/0.2967, allocations: 7.938 kB / 311 MB, free: 10.16 MB / 250.7 MB
Notification: Performance of NFTyping.typeComponents: time 0.0001625/0.2969, allocations: 23.83 kB / 311.1 MB, free: 10.14 MB / 250.7 MB
Notification: Performance of NFTyping.typeBindings: time 0.0003716/0.2972, allocations: 175.6 kB / 311.2 MB, free: 9.969 MB / 250.7 MB
Notification: Performance of NFTyping.typeClassSections: time 0.0003943/0.2976, allocations: 87.88 kB / 311.3 MB, free: 9.883 MB / 250.7 MB
Notification: Performance of NFFlatten.flatten: time 0.0004909/0.2982, allocations: 299.5 kB / 311.6 MB, free: 9.59 MB / 250.7 MB
Notification: Performance of NFFlatten.resolveConnections: time 0.0002451/0.2984, allocations: 92.86 kB / 311.7 MB, free: 9.496 MB / 250.7 MB
Notification: Performance of NFEvalConstants.evaluate: time 0.001336/0.2998, allocations: 0.8227 MB / 312.5 MB, free: 8.672 MB / 250.7 MB
Notification: Performance of NFSimplifyModel.simplify: time 0.0003818/0.3002, allocations: 223.5 kB / 312.7 MB, free: 8.453 MB / 250.7 MB
Notification: Performance of NFPackage.collectConstants: time 0.0001419/0.3003, allocations: 12 kB / 312.8 MB, free: 8.441 MB / 250.7 MB
Notification: Performance of NFFlatten.collectFunctions: time 0.0001449/0.3005, allocations: 19.88 kB / 312.8 MB, free: 8.422 MB / 250.7 MB
Notification: Performance of NFScalarize.scalarize: time 0.0002927/0.3008, allocations: 239.2 kB / 313 MB, free: 8.188 MB / 250.7 MB
Notification: Performance of NFVerifyModel.verify: time 0.0002781/0.3011, allocations: 209.1 kB / 313.2 MB, free: 7.977 MB / 250.7 MB
Notification: Performance of NFConvertDAE.convert: time 0.001624/0.3027, allocations: 1.197 MB / 314.4 MB, free: 6.777 MB / 250.7 MB
Notification: Performance of FrontEnd - DAE generated: time 4.087e-06/0.3027, allocations: 0 / 314.4 MB, free: 6.777 MB / 250.7 MB
Notification: Performance of FrontEnd: time 2.314e-06/0.3028, allocations: 0 / 314.4 MB, free: 6.777 MB / 250.7 MB
Notification: Performance of Transformations before backend: time 1.662e-05/0.3028, allocations: 0 / 314.4 MB, free: 6.777 MB / 250.7 MB
Notification: Model statistics after passing the front-end and creating the data structures used by the back-end:
 * Number of equations: 43
 * Number of variables: 43
Notification: Performance of Generate backend data structure: time 0.002476/0.3053, allocations: 1.477 MB / 315.9 MB, free: 5.195 MB / 250.7 MB
Notification: Performance of prepare preOptimizeDAE: time 5.025e-05/0.3053, allocations: 8.031 kB / 315.9 MB, free: 5.188 MB / 250.7 MB
Notification: Performance of preOpt introduceOutputAliases (simulation): time 0.0001849/0.3055, allocations: 62.53 kB / 316 MB, free: 5.117 MB / 250.7 MB
Notification: Performance of preOpt normalInlineFunction (simulation): time 0.0002577/0.3058, allocations: 130.5 kB / 316.1 MB, free: 4.988 MB / 250.7 MB
Notification: Performance of preOpt evaluateParameters (simulation): time 0.0009382/0.3068, allocations: 0.5088 MB / 316.6 MB, free: 4.43 MB / 250.7 MB
Notification: Performance of preOpt simplifyIfEquations (simulation): time 7.097e-05/0.3068, allocations: 27.98 kB / 316.6 MB, free: 4.402 MB / 250.7 MB
Notification: Performance of preOpt expandDerOperator (simulation): time 0.0001374/0.307, allocations: 31.98 kB / 316.6 MB, free: 4.371 MB / 250.7 MB
Notification: Performance of preOpt clockPartitioning (simulation): time 0.001696/0.3087, allocations: 0.6221 MB / 317.3 MB, free: 3.742 MB / 250.7 MB
Notification: Performance of preOpt findStateOrder (simulation): time 1.257e-05/0.3087, allocations: 3.938 kB / 317.3 MB, free: 3.738 MB / 250.7 MB
Notification: Performance of preOpt replaceEdgeChange (simulation): time 0.0001097/0.3089, allocations: 16 kB / 317.3 MB, free: 3.723 MB / 250.7 MB
Notification: Performance of preOpt inlineArrayEqn (simulation): time 9.177e-06/0.3089, allocations: 4 kB / 317.3 MB, free: 3.719 MB / 250.7 MB
Notification: Performance of preOpt removeEqualRHS (simulation): time 0.001221/0.3101, allocations: 471.6 kB / 317.8 MB, free: 3.258 MB / 250.7 MB
Notification: Performance of preOpt removeSimpleEquations (simulation): time 0.002481/0.3126, allocations: 1.08 MB / 318.8 MB, free: 2.121 MB / 250.7 MB
Notification: Performance of preOpt comSubExp (simulation): time 0.001529/0.3142, allocations: 0.6936 MB / 319.5 MB, free: 1.418 MB / 250.7 MB
Notification: Performance of preOpt evalFunc (simulation): time 1.961e-05/0.3142, allocations: 4 kB / 319.5 MB, free: 1.414 MB / 250.7 MB
Notification: Performance of preOpt encapsulateWhenConditions (simulation): time 0.001722/0.3159, allocations: 0.7699 MB / 320.3 MB, free: 0.6094 MB / 250.7 MB
Notification: Performance of pre-optimization done (n=36): time 4.398e-06/0.316, allocations: 0 / 320.3 MB, free: 0.6094 MB / 250.7 MB
Notification: Performance of matching and sorting (n=36): time 0.005019/0.321, allocations: 2.137 MB / 322.4 MB, free: 14.36 MB / 266.7 MB
Notification: Performance of inlineWhenForInitialization (initialization): time 0.0002884/0.3213, allocations: 321 kB / 322.8 MB, free: 13.98 MB / 266.7 MB
Notification: Performance of selectInitializationVariablesDAE (initialization): time 0.004175/0.3255, allocations: 1.829 MB / 324.6 MB, free: 12.14 MB / 266.7 MB
Notification: Performance of collectPreVariables (initialization): time 0.0002172/0.3258, allocations: 49.69 kB / 324.6 MB, free: 12.08 MB / 266.7 MB
Notification: Performance of collectInitialEqns (initialization): time 0.0003989/0.3262, allocations: 234.4 kB / 324.9 MB, free: 11.85 MB / 266.7 MB
Notification: Performance of collectInitialBindings (initialization): time 0.0001997/0.3264, allocations: 87.08 kB / 324.9 MB, free: 11.76 MB / 266.7 MB
Notification: Performance of simplifyInitialFunctions (initialization): time 8.763e-05/0.3265, allocations: 12 kB / 325 MB, free: 11.75 MB / 266.7 MB
Notification: Performance of setup shared object (initialization): time 0.0002407/0.3268, allocations: 378.7 kB / 325.3 MB, free: 11.37 MB / 266.7 MB
Notification: Performance of preBalanceInitialSystem (initialization): time 0.00119/0.328, allocations: 447.9 kB / 325.8 MB, free: 10.93 MB / 266.7 MB
Notification: Performance of partitionIndependentBlocks (initialization): time 0.001166/0.3291, allocations: 482.7 kB / 326.2 MB, free: 10.45 MB / 266.7 MB
Notification: Performance of analyzeInitialSystem (initialization): time 0.001092/0.3303, allocations: 0.5949 MB / 326.8 MB, free: 9.809 MB / 266.7 MB
Notification: Performance of solveInitialSystemEqSystem (initialization): time 4.298e-06/0.3303, allocations: 0 / 326.8 MB, free: 9.809 MB / 266.7 MB
Notification: Performance of matching and sorting (n=43) (initialization): time 0.003161/0.3334, allocations: 1.361 MB / 328.2 MB, free: 8.391 MB / 266.7 MB
Notification: Performance of prepare postOptimizeDAE: time 0.0003169/0.3338, allocations: 297.5 kB / 328.5 MB, free: 8.051 MB / 266.7 MB
Notification: Performance of postOpt simplifyComplexFunction (initialization): time 9.498e-06/0.3338, allocations: 0 / 328.5 MB, free: 8.051 MB / 266.7 MB
Notification: Performance of postOpt tearingSystem (initialization): time 1.812e-05/0.3338, allocations: 0 / 328.5 MB, free: 8.051 MB / 266.7 MB
Notification: Performance of postOpt solveSimpleEquations (initialization): time 4.199e-05/0.3339, allocations: 4 kB / 328.5 MB, free: 8.047 MB / 266.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (initialization): time 1.005e-05/0.3339, allocations: 3.984 kB / 328.5 MB, free: 8.043 MB / 266.7 MB
Notification: Performance of postOpt simplifyAllExpressions (initialization): time 0.000667/0.3346, allocations: 51.94 kB / 328.5 MB, free: 7.992 MB / 266.7 MB
Notification: Performance of postOpt collapseArrayExpressions (initialization): time 0.0002312/0.3348, allocations: 127.9 kB / 328.7 MB, free: 7.867 MB / 266.7 MB
Notification: Model statistics after passing the back-end for initialization:
 * Number of independent subsystems: 3
 * Number of states: 0 ()
 * Number of discrete variables: 43 ($PRE.dFFREGSRL.delay.inertialDelaySensitive[2].y,$PRE.dFFREGSRL.delay.inertialDelaySensitive[1].y,$whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,clock.y,data_0.y,reset.y,data_1.y,set.y,$PRE.dFFREGSRL.delay.inertialDelaySensitive[1].x,dFFREGSRL.delay.inertialDelaySensitive[1].x,dFFREGSRL.delay.inertialDelaySensitive[1].y,dFFREGSRL.delay.inertialDelaySensitive[1].delayTime,dFFREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dFFREGSRL.delay.inertialDelaySensitive[1].y_old,dFFREGSRL.delay.inertialDelaySensitive[1].lh,dFFREGSRL.delay.inertialDelaySensitive[1].t_next,$PRE.dFFREGSRL.delay.inertialDelaySensitive[2].x,dFFREGSRL.delay.inertialDelaySensitive[2].x,dFFREGSRL.delay.inertialDelaySensitive[2].y,dFFREGSRL.delay.inertialDelaySensitive[2].delayTime,dFFREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dFFREGSRL.delay.inertialDelaySensitive[2].y_old,dFFREGSRL.delay.inertialDelaySensitive[2].lh,dFFREGSRL.delay.inertialDelaySensitive[2].t_next,$PRE.dFFREGSRL.dFFSR.set,dFFREGSRL.dFFSR.set,$PRE.dFFREGSRL.dFFSR.reset,dFFREGSRL.dFFSR.reset,$PRE.dFFREGSRL.dFFSR.clock,dFFREGSRL.dFFSR.clock,dFFREGSRL.dFFSR.dataIn[1],dFFREGSRL.dFFSR.dataIn[2],dFFREGSRL.dFFSR.dataOut[1],dFFREGSRL.dFFSR.dataOut[2],dFFREGSRL.dFFSR.clock_flag,dFFREGSRL.dFFSR.reset_set_flag,dFFREGSRL.dFFSR.nextstate[1],dFFREGSRL.dFFSR.nextstate[2],dFFREGSRL.dFFSR.next_assign_val[1],dFFREGSRL.dFFSR.next_assign_val[2])
 * Number of discrete states: 0 ()
 * Number of clocked states: 0 ()
 * Top-level inputs: 0
Notification: Strong component statistics for initialization (22):
 * Single equations (assignments): 14
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of prepare postOptimizeDAE: time 0.001988/0.3368, allocations: 1.002 MB / 329.7 MB, free: 6.805 MB / 266.7 MB
Notification: Performance of postOpt lateInlineFunction (simulation): time 0.0002798/0.3371, allocations: 130.5 kB / 329.8 MB, free: 6.676 MB / 266.7 MB
Notification: Performance of postOpt wrapFunctionCalls (simulation): time 0.0006402/0.3378, allocations: 243.6 kB / 330 MB, free: 6.438 MB / 266.7 MB
Notification: Performance of postOpt inlineArrayEqn (simulation): time 7.815e-06/0.3378, allocations: 4 kB / 330 MB, free: 6.434 MB / 266.7 MB
Notification: Performance of postOpt constantLinearSystem (simulation): time 7.454e-06/0.3378, allocations: 0 / 330 MB, free: 6.434 MB / 266.7 MB
Notification: Performance of postOpt simplifysemiLinear (simulation): time 6.382e-06/0.3378, allocations: 7.922 kB / 330 MB, free: 6.426 MB / 266.7 MB
Notification: Performance of postOpt removeSimpleEquations (simulation): time 0.005195/0.343, allocations: 2.442 MB / 332.5 MB, free: 3.871 MB / 266.7 MB
Notification: Performance of postOpt simplifyComplexFunction (simulation): time 5.009e-06/0.3431, allocations: 0 / 332.5 MB, free: 3.871 MB / 266.7 MB
Notification: Performance of postOpt solveSimpleEquations (simulation): time 2.392e-05/0.3431, allocations: 4 kB / 332.5 MB, free: 3.867 MB / 266.7 MB
Notification: Performance of postOpt tearingSystem (simulation): time 6.823e-06/0.3431, allocations: 0 / 332.5 MB, free: 3.867 MB / 266.7 MB
Notification: Performance of postOpt inputDerivativesUsed (simulation): time 0.0001181/0.3433, allocations: 39.97 kB / 332.5 MB, free: 3.828 MB / 266.7 MB
Notification: Performance of postOpt calculateStrongComponentJacobians (simulation): time 3.917e-06/0.3433, allocations: 0 / 332.5 MB, free: 3.828 MB / 266.7 MB
Notification: Performance of postOpt calculateStateSetsJacobians (simulation): time 4.359e-06/0.3433, allocations: 4 kB / 332.5 MB, free: 3.824 MB / 266.7 MB
Notification: Performance of postOpt symbolicJacobian (simulation): time 0.00363/0.3469, allocations: 1.68 MB / 334.2 MB, free: 2.074 MB / 266.7 MB
Notification: Performance of postOpt removeConstants (simulation): time 0.001814/0.3488, allocations: 0.6785 MB / 334.9 MB, free: 1.375 MB / 266.7 MB
Notification: Performance of postOpt simplifyTimeIndepFuncCalls (simulation): time 0.0003022/0.3491, allocations: 63.97 kB / 335 MB, free: 1.312 MB / 266.7 MB
Notification: Performance of postOpt simplifyAllExpressions (simulation): time 0.0005831/0.3497, allocations: 31.97 kB / 335 MB, free: 1.281 MB / 266.7 MB
Notification: Performance of postOpt findZeroCrossings (simulation): time 0.0009665/0.3507, allocations: 359.6 kB / 335.3 MB, free: 0.9297 MB / 266.7 MB
Notification: Performance of postOpt collapseArrayExpressions (simulation): time 0.000274/0.351, allocations: 159.9 kB / 335.5 MB, free: 0.7734 MB / 266.7 MB
Notification: Performance of sorting global known variables: time 0.003186/0.3542, allocations: 1.325 MB / 336.8 MB, free: 15.45 MB / 282.7 MB
Notification: Performance of sort global known variables: time 3.91e-07/0.3542, allocations: 0 / 336.8 MB, free: 15.45 MB / 282.7 MB
Notification: Performance of remove unused functions: time 0.0008321/0.355, allocations: 159.8 kB / 337 MB, free: 15.29 MB / 282.7 MB
Notification: Model statistics after passing the back-end for simulation:
 * Number of independent subsystems: 1
 * Number of states: 0 ()
 * Number of discrete variables: 36 ($whenCondition1,$whenCondition2,$whenCondition3,$whenCondition4,clock.y,data_0.y,reset.y,data_1.y,set.y,dFFREGSRL.delay.inertialDelaySensitive[1].x,dFFREGSRL.delay.inertialDelaySensitive[1].y,dFFREGSRL.delay.inertialDelaySensitive[1].delayTime,dFFREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dFFREGSRL.delay.inertialDelaySensitive[1].y_old,dFFREGSRL.delay.inertialDelaySensitive[1].lh,dFFREGSRL.delay.inertialDelaySensitive[1].t_next,dFFREGSRL.delay.inertialDelaySensitive[2].x,dFFREGSRL.delay.inertialDelaySensitive[2].y,dFFREGSRL.delay.inertialDelaySensitive[2].delayTime,dFFREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dFFREGSRL.delay.inertialDelaySensitive[2].y_old,dFFREGSRL.delay.inertialDelaySensitive[2].lh,dFFREGSRL.delay.inertialDelaySensitive[2].t_next,dFFREGSRL.dFFSR.set,dFFREGSRL.dFFSR.reset,dFFREGSRL.dFFSR.clock,dFFREGSRL.dFFSR.dataIn[1],dFFREGSRL.dFFSR.dataIn[2],dFFREGSRL.dFFSR.dataOut[1],dFFREGSRL.dFFSR.dataOut[2],dFFREGSRL.dFFSR.clock_flag,dFFREGSRL.dFFSR.reset_set_flag,dFFREGSRL.dFFSR.nextstate[1],dFFREGSRL.dFFSR.nextstate[2],dFFREGSRL.dFFSR.next_assign_val[1],dFFREGSRL.dFFSR.next_assign_val[2])
 * Number of discrete states: 34 (set.y,data_1.y,reset.y,data_0.y,clock.y,dFFREGSRL.dFFSR.dataOut[2],dFFREGSRL.dFFSR.dataOut[1],dFFREGSRL.dFFSR.next_assign_val[2],dFFREGSRL.dFFSR.next_assign_val[1],dFFREGSRL.dFFSR.nextstate[2],dFFREGSRL.dFFSR.nextstate[1],dFFREGSRL.dFFSR.reset_set_flag,dFFREGSRL.dFFSR.clock_flag,dFFREGSRL.dFFSR.clock,dFFREGSRL.dFFSR.reset,dFFREGSRL.dFFSR.set,dFFREGSRL.delay.inertialDelaySensitive[2].y,dFFREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dFFREGSRL.delay.inertialDelaySensitive[2].t_next,dFFREGSRL.delay.inertialDelaySensitive[2].delayTime,dFFREGSRL.delay.inertialDelaySensitive[2].lh,dFFREGSRL.delay.inertialDelaySensitive[2].y_old,$whenCondition4,$whenCondition3,dFFREGSRL.delay.inertialDelaySensitive[2].x,dFFREGSRL.delay.inertialDelaySensitive[1].y,dFFREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dFFREGSRL.delay.inertialDelaySensitive[1].t_next,dFFREGSRL.delay.inertialDelaySensitive[1].delayTime,dFFREGSRL.delay.inertialDelaySensitive[1].lh,dFFREGSRL.delay.inertialDelaySensitive[1].y_old,$whenCondition2,$whenCondition1,dFFREGSRL.delay.inertialDelaySensitive[1].x)
 * Number of clocked states: 0 ()
 * Top-level inputs: 0
Notification: Strong component statistics for simulation (15):
 * Single equations (assignments): 7
 * Array equations: 0
 * Algorithm blocks: 8
 * Record equations: 0
 * When equations: 0
 * If-equations: 0
 * Equation systems (linear and non-linear blocks): 0
 * Torn equation systems: 0
 * Mixed (continuous/discrete) equation systems: 0
Notification: Performance of Backend phase and start with SimCode phase: time 0.004311/0.3594, allocations: 2.3 MB / 339.3 MB, free: 12.91 MB / 282.7 MB
Notification: Performance of simCode: created initialization part: time 0.003572/0.363, allocations: 1.932 MB / 341.2 MB, free: 10.88 MB / 282.7 MB
Notification: Performance of simCode: created event and clocks part: time 4.128e-06/0.363, allocations: 0 / 341.2 MB, free: 10.88 MB / 282.7 MB
Notification: Performance of simCode: created simulation system equations: time 0.002279/0.3653, allocations: 1.397 MB / 342.6 MB, free: 9.379 MB / 282.7 MB
Notification: Performance of simCode: created of all other equations (e.g. parameter, nominal, assert, etc): time 0.001897/0.3672, allocations: 301.9 kB / 342.9 MB, free: 9.086 MB / 282.7 MB
Notification: Performance of simCode: created linear, non-linear and system jacobian parts: time 0.02021/0.3874, allocations: 6.966 MB / 349.9 MB, free: 2.051 MB / 282.7 MB
Notification: Performance of simCode: some other stuff during SimCode phase: time 0.001733/0.3892, allocations: 1.216 MB / 351.1 MB, free: 0.8047 MB / 282.7 MB
Notification: Performance of simCode: alias equations: time 0.0004922/0.3898, allocations: 159 kB / 351.2 MB, free: 0.6484 MB / 282.7 MB
Notification: Performance of simCode: all other stuff during SimCode phase: time 0.0002734/0.3901, allocations: 151.4 kB / 351.4 MB, free: 0.5039 MB / 282.7 MB
Notification: Performance of SimCode: time 1.082e-06/0.3901, allocations: 0 / 351.4 MB, free: 0.5039 MB / 282.7 MB
Notification: Performance of buildModelFMU: Generate the FMI files: time 0.06589/0.456, allocations: 21.94 MB / 373.3 MB, free: 10.17 MB / 314.7 MB
Notification: Performance of buildModelFMU: configured platform static using cached values: time 0.0003291/0.4564, allocations: 176.3 kB / 373.5 MB, free: 9.926 MB / 314.7 MB
Notification: Performance of buildModelFMU: Generate platform static: time 2.91/3.366, allocations: 0 / 373.5 MB, free: 9.926 MB / 314.7 MB
""

Variables in the reference:time,dFFREGSRL.dataOut[1],dFFREGSRL.dataOut[2]

Variables in the result:clock.n,clock.t[1],clock.t[2],clock.t[3],clock.x[1],clock.x[2],clock.x[3],clock.y,clock.y0,dFFREGSRL.clock,dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'-',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'0',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'1',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'H',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'L',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'U',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'W',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'X',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'-'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'0'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'1'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'H'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'L'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'U'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'W'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'X'],dFFREGSRL.dFFSR.ResetSetMap[Modelica.Electrical.Digital.Interfaces.Logic.'Z',Modelica.Electrical.Digital.Interfaces.Logic.'Z'],dFFREGSRL.dFFSR.clock,dFFREGSRL.dFFSR.clock_flag,dFFREGSRL.dFFSR.dataIn[1],dFFREGSRL.dFFSR.dataIn[2],dFFREGSRL.dFFSR.dataOut[1],dFFREGSRL.dFFSR.dataOut[2],dFFREGSRL.dFFSR.n,dFFREGSRL.dFFSR.next_assign_val[1],dFFREGSRL.dFFSR.next_assign_val[2],dFFREGSRL.dFFSR.nextstate[1],dFFREGSRL.dFFSR.nextstate[2],dFFREGSRL.dFFSR.reset,dFFREGSRL.dFFSR.reset_set_flag,dFFREGSRL.dFFSR.set,dFFREGSRL.dFFSR.strength,dFFREGSRL.dataIn[1],dFFREGSRL.dataIn[2],dFFREGSRL.dataOut[1],dFFREGSRL.dataOut[2],dFFREGSRL.delay.inertialDelaySensitive[1].delayTime,dFFREGSRL.delay.inertialDelaySensitive[1].lh,dFFREGSRL.delay.inertialDelaySensitive[1].tHL,dFFREGSRL.delay.inertialDelaySensitive[1].tLH,dFFREGSRL.delay.inertialDelaySensitive[1].t_next,dFFREGSRL.delay.inertialDelaySensitive[1].x,dFFREGSRL.delay.inertialDelaySensitive[1].y,dFFREGSRL.delay.inertialDelaySensitive[1].y0,dFFREGSRL.delay.inertialDelaySensitive[1].y_auxiliary,dFFREGSRL.delay.inertialDelaySensitive[1].y_old,dFFREGSRL.delay.inertialDelaySensitive[2].delayTime,dFFREGSRL.delay.inertialDelaySensitive[2].lh,dFFREGSRL.delay.inertialDelaySensitive[2].tHL,dFFREGSRL.delay.inertialDelaySensitive[2].tLH,dFFREGSRL.delay.inertialDelaySensitive[2].t_next,dFFREGSRL.delay.inertialDelaySensitive[2].x,dFFREGSRL.delay.inertialDelaySensitive[2].y,dFFREGSRL.delay.inertialDelaySensitive[2].y0,dFFREGSRL.delay.inertialDelaySensitive[2].y_auxiliary,dFFREGSRL.delay.inertialDelaySensitive[2].y_old,dFFREGSRL.delay.n,dFFREGSRL.delay.tHL,dFFREGSRL.delay.tLH,dFFREGSRL.delay.x[1],dFFREGSRL.delay.x[2],dFFREGSRL.delay.y[1],dFFREGSRL.delay.y[2],dFFREGSRL.n,dFFREGSRL.reset,dFFREGSRL.set,dFFREGSRL.strength,dFFREGSRL.tHL,dFFREGSRL.tLH,data_0.n,data_0.t[1],data_0.x[1],data_0.y,data_0.y0,data_1.n,data_1.t[1],data_1.x[1],data_1.y,data_1.y0,reset.n,reset.t[1],reset.t[2],reset.t[3],reset.x[1],reset.x[2],reset.x[3],reset.y,reset.y0,set.n,set.t[1],set.t[2],set.t[3],set.x[1],set.x[2],set.x[3],set.y,set.y0,time